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71a6da37c5
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refactor: reflow the conclusion
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2020-11-13 03:20:11 +01:00 |
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1588cf97b5
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refactor: switch places {equations,Karnaugh maps}
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2020-11-13 03:01:04 +01:00 |
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a847bae058
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chore: enlarge pictures
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2020-11-13 02:59:42 +01:00 |
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9d0cd68820
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fix: correct the incorrect negation
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2020-11-13 02:57:32 +01:00 |
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2096667c5e
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chore: add Karnaugh map for circuit 1
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2020-11-13 02:54:29 +01:00 |
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845f93093e
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chore: remove vert space in equations and captions
to fit in another Karnaugh map
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2020-11-13 02:41:06 +01:00 |
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1d264b2372
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chore: add karnaugh map for circuit 2 + subsection
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2020-11-13 02:34:25 +01:00 |
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690750b8bb
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chore: add circuit 2 equations and subsections
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2020-11-13 01:18:08 +01:00 |
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cf90f36b8c
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chore: add diagram of unknown logical func. (XOR)
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2020-11-13 01:10:47 +01:00 |
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d0cca2c130
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chore: add circuit diagram for NAND RT measurement
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2020-11-13 01:03:54 +01:00 |
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eea1814c2a
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chore: add table for NAND rise time diagram
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2020-11-13 00:45:48 +01:00 |
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739deb514a
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chore: remove redundant sections
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2020-11-13 00:31:30 +01:00 |
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984fccf32d
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chore: add conclusion
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2020-11-13 00:30:03 +01:00 |
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4a7551c443
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chore: add circuit{1,2} diagrams + NAND rise time
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2020-11-13 00:18:22 +01:00 |
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1cd7173ba1
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chore: add circuit 2 truth table
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2020-11-13 00:05:52 +01:00 |
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1e14f7dfa1
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chore: add circuit 1 truth table and equations
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2020-11-12 23:52:40 +01:00 |
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42444f41bd
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chore: add content to section 4
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2020-11-12 22:19:17 +01:00 |
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a0c6bfc733
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chore: add content to section 5
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2020-11-12 21:58:46 +01:00 |
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823ba6bbfb
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chore: add document sections
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2020-11-12 21:10:05 +01:00 |
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ef0f3700c2
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initial commit
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2020-11-12 20:27:45 +01:00 |
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