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Author	SHA1	Message	Date
surtur	0f1f67615f	refactor: change description section to unnumbered	2020-11-13 03:37:12 +01:00
surtur	99c19c4d25	chore: add subsubsections for truth tables	2020-11-13 03:23:45 +01:00
surtur	d2ece129c0	fix: correct a typo (use plural)	2020-11-13 03:21:18 +01:00
surtur	71a6da37c5	refactor: reflow the conclusion	2020-11-13 03:20:11 +01:00
surtur	1588cf97b5	refactor: switch places {equations,Karnaugh maps}	2020-11-13 03:01:04 +01:00
surtur	a847bae058	chore: enlarge pictures	2020-11-13 02:59:42 +01:00
surtur	9d0cd68820	fix: correct the incorrect negation	2020-11-13 02:57:32 +01:00
surtur	2096667c5e	chore: add Karnaugh map for circuit 1	2020-11-13 02:54:29 +01:00
surtur	845f93093e	chore: remove vert space in equations and captions ... to fit in another Karnaugh map	2020-11-13 02:41:06 +01:00
surtur	1d264b2372	chore: add karnaugh map for circuit 2 + subsection	2020-11-13 02:34:25 +01:00
surtur	690750b8bb	chore: add circuit 2 equations and subsections	2020-11-13 01:18:08 +01:00
surtur	cf90f36b8c	chore: add diagram of unknown logical func. (XOR)	2020-11-13 01:10:47 +01:00
surtur	d0cca2c130	chore: add circuit diagram for NAND RT measurement	2020-11-13 01:03:54 +01:00
surtur	eea1814c2a	chore: add table for NAND rise time diagram	2020-11-13 00:45:48 +01:00
surtur	739deb514a	chore: remove redundant sections	2020-11-13 00:31:30 +01:00
surtur	984fccf32d	chore: add conclusion	2020-11-13 00:30:03 +01:00
surtur	4a7551c443	chore: add circuit{1,2} diagrams + NAND rise time	2020-11-13 00:18:22 +01:00
surtur	1cd7173ba1	chore: add circuit 2 truth table	2020-11-13 00:05:52 +01:00
surtur	1e14f7dfa1	chore: add circuit 1 truth table and equations	2020-11-12 23:52:40 +01:00
surtur	42444f41bd	chore: add content to section 4	2020-11-12 22:19:17 +01:00
surtur	a0c6bfc733	chore: add content to section 5	2020-11-12 21:58:46 +01:00
surtur	823ba6bbfb	chore: add document sections	2020-11-12 21:10:05 +01:00
surtur	ef0f3700c2	initial commit	2020-11-12 20:27:45 +01:00