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readme tweaks

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Jack O'Connor 2020-10-20 11:59:25 -04:00
parent 5361572c4a
commit b928701893
1 changed files with 10 additions and 10 deletions
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@ -181,12 +181,12 @@ expects to be linked with code for five different instruction sets:
portable C, SSE2, SSE4.1, AVX2, and AVX-512. portable C, SSE2, SSE4.1, AVX2, and AVX-512.
For each of the x86 SIMD instruction sets, two versions are available, For each of the x86 SIMD instruction sets, two versions are available,
one in assembly (with three flavors: Unix, Windows MSVC, and Windows one in assembly (which is further divided into three flavors: Unix,
GNU) and one using C intrinsics. The assembly versions are generally Windows MSVC, and Windows GNU) and one using C intrinsics. The assembly
preferred: they perform better, they perform more consistently across versions are generally preferred: they perform better, they perform more
different compilers, and they build more quickly. On the other hand, the consistently across different compilers, and they build more quickly. On
assembly versions are x86\_64-only, and you need to select the right the other hand, the assembly versions are x86\_64-only, and you need to
flavor for your target platform. select the right flavor for your target platform.
Here's an example of building a shared library on x86\_64 Linux using Here's an example of building a shared library on x86\_64 Linux using
the assembly implementations: the assembly implementations:
@ -212,12 +212,12 @@ gcc -shared -O3 -o libblake3.so blake3.c blake3_dispatch.c blake3_portable.c \
``` ```
Note above that building `blake3_avx512.c` requires both `-mavx512f` and Note above that building `blake3_avx512.c` requires both `-mavx512f` and
`-mavx512vl` under GCC and Clang, as shown above. Under MSVC, the single `-mavx512vl` under GCC and Clang. Under MSVC, the single `/arch:AVX512`
`/arch:AVX512` flag is sufficient. The MSVC equivalent of `-mavx2` is flag is sufficient. The MSVC equivalent of `-mavx2` is `/arch:AVX2`.
`/arch:AVX2`. MSVC enables SSE4.1 by defaut, and it doesn't have a MSVC enables SSE2 and SSE4.1 by defaut, and it doesn't have a
corresponding flag. corresponding flag.
If you want to omit SIMD code on x86, you need to explicitly disable If you want to omit SIMD code entirely, you need to explicitly disable
each instruction set. Here's an example of building a shared library on each instruction set. Here's an example of building a shared library on
x86 with only portable code: x86 with only portable code: