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openwrt/target/linux/ar71xx
Felix Fietkau c75a0e86b1 ar71xx: add mask and shift for RXD/RDV bits in AR934X register file
The commit r38948 ("ag71xx: add F1E specific feature bit definitions to AR934X
register file") introduced definitions for some bits in the RDV/RXD part of the
ETH_CFG register of AR934x. These are incomplete because ETH_RXDV_DELAY is
specified as 17:16 and ETH_RXD_DELAY is specified 15:14. The original commit
only specified the lower bits. The upper bits also have to be unset when the
lower bits should only be set.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>

SVN-Revision: 45522
2015-04-20 15:00:41 +00:00
..
base-files ar71xx: enable LEDs on Hornet-UB X2 2015-04-09 10:32:08 +00:00
files ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN 2015-04-20 15:00:20 +00:00
generic ar71xx: adjust OM5P profile for the OpenMesh OM5P-AN board 2015-03-17 09:43:56 +00:00
image Revert "ar71xx/image: move TPLINK-LZMA image to new build code" (r45490) 2015-04-19 19:19:12 +00:00
mikrotik ar71xx: add initial support for RB911G-5HPacD 2015-04-07 20:04:03 +00:00
nand
patches-3.18 ar71xx: add mask and shift for RXD/RDV bits in AR934X register file 2015-04-20 15:00:41 +00:00
base-files.mk
config-3.18 ar71xx: Enable AT803X_PHY to set special flags 2015-04-14 19:00:57 +00:00
Makefile ar71xx: make v3.18 default 2015-02-17 14:33:29 +00:00
modules.mk