mirror of
https://github.com/BLAKE3-team/BLAKE3
synced 2024-05-26 11:46:04 +02:00
d91f20dd29
Wire up basic functions and features for SSE2 support using the SSE4.1 version
as a basis without implementing the SSE2 instructions yet.
* Cargo.toml: add no_sse2 feature
* benches/bench.rs: wire SSE2 benchmarks
* build.rs: add SSE2 rust intrinsics and assembly builds
* c/Makefile.testing: add SSE2 C and assembly targets
* c/README.md: add SSE2 to C build instructions
* c/blake3_c_rust_bindings/build.rs: add SSE2 C rust binding builds
* c/blake3_c_rust_bindings/src/lib.rs: add SSE2 C rust bindings
* c/blake3_dispatch.c: add SSE2 C dispatch
* c/blake3_impl.h: add SSE2 C function prototypes
* c/blake3_sse2.c: add SSE2 C intrinsic file starting with SSE4.1 version
* c/blake3_sse2_x86-64_{unix.S,windows_gnu.S,windows_msvc.asm}: add SSE2
assembly files starting with SSE4.1 version
* src/ffi_sse2.rs: add rust implementation using SSE2 C rust bindings
* src/lib.rs: add SSE2 rust intrinsics and SSE2 C rust binding rust SSE2 module
configurations
* src/platform.rs: add SSE2 rust platform detection and dispatch
* src/rust_sse2.rs: add SSE2 rust intrinsic file starting with SSE4.1 version
* tools/instruction_set_support/src/main.rs: add SSE2 feature detection
271 lines
7.2 KiB
C
271 lines
7.2 KiB
C
#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include "blake3_impl.h"
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#if defined(IS_X86)
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#if defined(_MSC_VER)
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#include <intrin.h>
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#elif defined(__GNUC__)
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#include <immintrin.h>
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#else
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#error "Unimplemented!"
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#endif
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#endif
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#if defined(IS_X86)
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static uint64_t xgetbv() {
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#if defined(_MSC_VER)
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return _xgetbv(0);
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#else
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uint32_t eax = 0, edx = 0;
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__asm__ __volatile__("xgetbv\n" : "=a"(eax), "=d"(edx) : "c"(0));
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return ((uint64_t)edx << 32) | eax;
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#endif
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}
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static void cpuid(uint32_t out[4], uint32_t id) {
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#if defined(_MSC_VER)
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__cpuid((int *)out, id);
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#elif defined(__i386__) || defined(_M_IX86)
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__asm__ __volatile__("movl %%ebx, %1\n"
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"cpuid\n"
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"xchgl %1, %%ebx\n"
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: "=a"(out[0]), "=r"(out[1]), "=c"(out[2]), "=d"(out[3])
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: "a"(id));
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#else
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__asm__ __volatile__("cpuid\n"
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: "=a"(out[0]), "=b"(out[1]), "=c"(out[2]), "=d"(out[3])
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: "a"(id));
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#endif
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}
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static void cpuidex(uint32_t out[4], uint32_t id, uint32_t sid) {
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#if defined(_MSC_VER)
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__cpuidex((int *)out, id, sid);
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#elif defined(__i386__) || defined(_M_IX86)
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__asm__ __volatile__("movl %%ebx, %1\n"
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"cpuid\n"
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"xchgl %1, %%ebx\n"
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: "=a"(out[0]), "=r"(out[1]), "=c"(out[2]), "=d"(out[3])
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: "a"(id), "c"(sid));
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#else
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__asm__ __volatile__("cpuid\n"
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: "=a"(out[0]), "=b"(out[1]), "=c"(out[2]), "=d"(out[3])
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: "a"(id), "c"(sid));
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#endif
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}
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#endif
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enum cpu_feature {
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SSE2 = 1 << 0,
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SSSE3 = 1 << 1,
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SSE41 = 1 << 2,
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AVX = 1 << 3,
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AVX2 = 1 << 4,
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AVX512F = 1 << 5,
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AVX512VL = 1 << 6,
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/* ... */
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UNDEFINED = 1 << 30
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};
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#if !defined(BLAKE3_TESTING)
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static /* Allow the variable to be controlled manually for testing */
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#endif
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enum cpu_feature g_cpu_features = UNDEFINED;
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#if !defined(BLAKE3_TESTING)
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static
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#endif
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enum cpu_feature
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get_cpu_features() {
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if (g_cpu_features != UNDEFINED) {
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return g_cpu_features;
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} else {
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#if defined(IS_X86)
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uint32_t regs[4] = {0};
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uint32_t *eax = ®s[0], *ebx = ®s[1], *ecx = ®s[2], *edx = ®s[3];
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(void)edx;
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enum cpu_feature features = 0;
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cpuid(regs, 0);
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const int max_id = *eax;
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cpuid(regs, 1);
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#if defined(__amd64__) || defined(_M_X64)
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features |= SSE2;
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#else
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if (*edx & (1UL << 26))
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features |= SSE2;
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#endif
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if (*ecx & (1UL << 0))
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features |= SSSE3;
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if (*ecx & (1UL << 19))
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features |= SSE41;
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if (*ecx & (1UL << 27)) { // OSXSAVE
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const uint64_t mask = xgetbv();
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if ((mask & 6) == 6) { // SSE and AVX states
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if (*ecx & (1UL << 28))
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features |= AVX;
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if (max_id >= 7) {
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cpuidex(regs, 7, 0);
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if (*ebx & (1UL << 5))
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features |= AVX2;
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if ((mask & 224) == 224) { // Opmask, ZMM_Hi256, Hi16_Zmm
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if (*ebx & (1UL << 31))
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features |= AVX512VL;
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if (*ebx & (1UL << 16))
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features |= AVX512F;
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}
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}
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}
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}
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g_cpu_features = features;
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return features;
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#else
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/* How to detect NEON? */
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return 0;
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#endif
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}
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}
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void blake3_compress_in_place(uint32_t cv[8],
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const uint8_t block[BLAKE3_BLOCK_LEN],
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uint8_t block_len, uint64_t counter,
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uint8_t flags) {
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#if defined(IS_X86)
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const enum cpu_feature features = get_cpu_features();
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#if !defined(BLAKE3_NO_AVX512)
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if (features & AVX512VL) {
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blake3_compress_in_place_avx512(cv, block, block_len, counter, flags);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE41)
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if (features & SSE41) {
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blake3_compress_in_place_sse41(cv, block, block_len, counter, flags);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE2)
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if (features & SSE2) {
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blake3_compress_in_place_sse2(cv, block, block_len, counter, flags);
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return;
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}
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#endif
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#endif
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blake3_compress_in_place_portable(cv, block, block_len, counter, flags);
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}
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void blake3_compress_xof(const uint32_t cv[8],
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const uint8_t block[BLAKE3_BLOCK_LEN],
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uint8_t block_len, uint64_t counter, uint8_t flags,
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uint8_t out[64]) {
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#if defined(IS_X86)
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const enum cpu_feature features = get_cpu_features();
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#if !defined(BLAKE3_NO_AVX512)
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if (features & AVX512VL) {
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blake3_compress_xof_avx512(cv, block, block_len, counter, flags, out);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE41)
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if (features & SSE41) {
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blake3_compress_xof_sse41(cv, block, block_len, counter, flags, out);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE2)
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if (features & SSE2) {
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blake3_compress_xof_sse2(cv, block, block_len, counter, flags, out);
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return;
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}
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#endif
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#endif
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blake3_compress_xof_portable(cv, block, block_len, counter, flags, out);
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}
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void blake3_hash_many(const uint8_t *const *inputs, size_t num_inputs,
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size_t blocks, const uint32_t key[8], uint64_t counter,
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bool increment_counter, uint8_t flags,
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uint8_t flags_start, uint8_t flags_end, uint8_t *out) {
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#if defined(IS_X86)
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const enum cpu_feature features = get_cpu_features();
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#if !defined(BLAKE3_NO_AVX512)
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if ((features & (AVX512F|AVX512VL)) == (AVX512F|AVX512VL)) {
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blake3_hash_many_avx512(inputs, num_inputs, blocks, key, counter,
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increment_counter, flags, flags_start, flags_end,
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out);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_AVX2)
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if (features & AVX2) {
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blake3_hash_many_avx2(inputs, num_inputs, blocks, key, counter,
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increment_counter, flags, flags_start, flags_end,
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out);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE41)
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if (features & SSE41) {
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blake3_hash_many_sse41(inputs, num_inputs, blocks, key, counter,
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increment_counter, flags, flags_start, flags_end,
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out);
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return;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE2)
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if (features & SSE2) {
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blake3_hash_many_sse2(inputs, num_inputs, blocks, key, counter,
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increment_counter, flags, flags_start, flags_end,
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out);
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return;
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}
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#endif
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#endif
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#if defined(BLAKE3_USE_NEON)
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blake3_hash_many_neon(inputs, num_inputs, blocks, key, counter,
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increment_counter, flags, flags_start, flags_end, out);
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return;
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#endif
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blake3_hash_many_portable(inputs, num_inputs, blocks, key, counter,
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increment_counter, flags, flags_start, flags_end,
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out);
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}
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// The dynamically detected SIMD degree of the current platform.
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size_t blake3_simd_degree(void) {
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#if defined(IS_X86)
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const enum cpu_feature features = get_cpu_features();
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#if !defined(BLAKE3_NO_AVX512)
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if ((features & (AVX512F|AVX512VL)) == (AVX512F|AVX512VL)) {
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return 16;
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}
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#endif
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#if !defined(BLAKE3_NO_AVX2)
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if (features & AVX2) {
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return 8;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE41)
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if (features & SSE41) {
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return 4;
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}
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#endif
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#if !defined(BLAKE3_NO_SSE2)
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if (features & SSE2) {
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return 4;
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}
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#endif
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#endif
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#if defined(BLAKE3_USE_NEON)
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return 4;
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#endif
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return 1;
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}
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