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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
26 lines
1.1 KiB
Diff
26 lines
1.1 KiB
Diff
From 204cd3516f59eb7040b814429187e674f49ba065 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Mon, 11 Jul 2022 22:34:05 +0200
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Subject: [PATCH] pinctrl: qcom-pmic-gpio: add support for PMP8074
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PMP8074 has 12 GPIO-s with holes on GPIO1 and GPIO12.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Link: https://lore.kernel.org/r/20220711203408.2949888-4-robimarko@gmail.com
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 ++
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1 file changed, 2 insertions(+)
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--- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
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+++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
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@@ -1167,6 +1167,8 @@ static const struct of_device_id pmic_gp
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{ .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 },
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{ .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 },
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{ .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 },
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+ /* pmp8074 has 12 GPIOs with holes on 1 and 12 */
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+ { .compatible = "qcom,pmp8074-gpio", .data = (void *) 12 },
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{ .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 },
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{ .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 },
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/* pms405 has 12 GPIOs with holes on 1, 9, and 10 */
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