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57 lines
1.7 KiB
Diff
57 lines
1.7 KiB
Diff
From 95c1fe603fbea0fd01d98262bd5ff7d5442a86db Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Mon, 24 Feb 2014 17:29:06 +0100
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Subject: [PATCH] ARM: sun6i: dt: Fix mod0 compatible
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The module 0 clock compatibles were changed between the time the patch was sent
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and it was merged. Update the compatibles.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
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index af6f87c..42f310a 100644
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--- a/arch/arm/boot/dts/sun6i-a31.dtsi
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+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
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@@ -200,7 +200,7 @@
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spi0_clk: clk@01c200a0 {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-mod0-clk";
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+ compatible = "allwinner,sun4i-a10-mod0-clk";
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reg = <0x01c200a0 0x4>;
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clocks = <&osc24M>, <&pll6>;
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clock-output-names = "spi0";
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@@ -208,7 +208,7 @@
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spi1_clk: clk@01c200a4 {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-mod0-clk";
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+ compatible = "allwinner,sun4i-a10-mod0-clk";
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reg = <0x01c200a4 0x4>;
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clocks = <&osc24M>, <&pll6>;
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clock-output-names = "spi1";
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@@ -216,7 +216,7 @@
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spi2_clk: clk@01c200a8 {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-mod0-clk";
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+ compatible = "allwinner,sun4i-a10-mod0-clk";
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reg = <0x01c200a8 0x4>;
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clocks = <&osc24M>, <&pll6>;
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clock-output-names = "spi2";
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@@ -224,7 +224,7 @@
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spi3_clk: clk@01c200ac {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-mod0-clk";
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+ compatible = "allwinner,sun4i-a10-mod0-clk";
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reg = <0x01c200ac 0x4>;
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clocks = <&osc24M>, <&pll6>;
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clock-output-names = "spi3";
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--
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2.0.3
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