1
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-10-20 06:28:12 +02:00
openwrt/target/linux/generic/backport-5.4/761-net-ethernet-mediatek-Refine-the-timing-of-GDM-PSE-s.patch
Felix Fietkau f0cc5f6c0a ramips/mediatek: improve GRO performance, fix PPE packet parsing
Backport upstream changes to initialize GDM settings and reset PPE
Allow GMAC to recognize the special tag to fix PPE packet parsing
Improve GRO performance by passing PPE L4 hash as skb hash

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-09-13 11:14:32 +02:00

46 lines
1.3 KiB
Diff

From: MarkLee <Mark-MC.Lee@mediatek.com>
Date: Wed, 13 Nov 2019 10:38:43 +0800
Subject: [PATCH] net: ethernet: mediatek: Refine the timing of GDM/PSE setup
Refine the timing of GDM/PSE setup, move it from mtk_hw_init
to mtk_open. This is recommended by the mt762x HW design to
do GDM/PSE setup only after PDMA has been started.
We exclude mt7628 in mtk_gdm_config function since it is a old IP
and there is no GDM/PSE block on it.
Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2215,6 +2215,9 @@ static void mtk_gdm_config(struct mtk_et
{
int i;
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+ return;
+
for (i = 0; i < MTK_MAC_COUNT; i++) {
u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
@@ -2253,6 +2256,8 @@ static int mtk_open(struct net_device *d
if (err)
return err;
+ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
+
napi_enable(&eth->tx_napi);
napi_enable(&eth->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
@@ -2436,8 +2441,6 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
- mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
-
return 0;
err_disable_pm: