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d2a1075973
These patches backport support for the ARMADA 3700 COMPHY driver. Also backported is the mvneta driver. This will allow switching the SGMII speed using SMC calls. To support this you must update the firmware using Marvells 18.12 version (this has now been upstreamed). The mvneta driver allows 2500basex and 2500baset. Signed-off-by: Scott Roberts <ttocsr@gmail.com>
56 lines
2.4 KiB
Diff
56 lines
2.4 KiB
Diff
From 83e65df6dfece9eb588735459428f221eb930c0c Mon Sep 17 00:00:00 2001
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From: Maxime Chevallier <maxime.chevallier@bootlin.com>
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Date: Fri, 9 Nov 2018 09:17:33 +0100
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Subject: [PATCH] net: mvneta: Don't advertise 2.5G modes
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Using 2.5G speed relies on the SerDes lanes being configured
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accordingly. The lanes have to be reconfigured to switch between
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1G and 2.5G, and for now only the bootloader does this configuration.
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In the case we add a Comphy driver to handle switching the lanes
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dynamically, it's better for now to stick with supporting only 1G and
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add advertisement for 2.5G once we really are capable of handling both
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speeds without problem.
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Since the interface mode is initialy taken from the DT, we want to make
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sure that adding comphy support won't break boards that don't update
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their dtb.
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Fixes: da58a931f248 ("net: mvneta: Add support for 2500Mbps SGMII")
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Reported-by: Andrew Lunn <andrew@lunn.ch>
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Reported-by: Russell King <linux@armlinux.org.uk>
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Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/marvell/mvneta.c | 12 +++---------
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1 file changed, 3 insertions(+), 9 deletions(-)
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--- a/drivers/net/ethernet/marvell/mvneta.c
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+++ b/drivers/net/ethernet/marvell/mvneta.c
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@@ -3346,7 +3346,6 @@ static void mvneta_validate(struct net_d
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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state->interface != PHY_INTERFACE_MODE_QSGMII &&
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state->interface != PHY_INTERFACE_MODE_SGMII &&
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- state->interface != PHY_INTERFACE_MODE_2500BASEX &&
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!phy_interface_mode_is_8023z(state->interface) &&
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!phy_interface_mode_is_rgmii(state->interface)) {
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bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
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@@ -3360,14 +3359,9 @@ static void mvneta_validate(struct net_d
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/* Asymmetric pause is unsupported */
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phylink_set(mask, Pause);
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- /* We cannot use 1Gbps when using the 2.5G interface. */
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- if (state->interface == PHY_INTERFACE_MODE_2500BASEX) {
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- phylink_set(mask, 2500baseT_Full);
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- phylink_set(mask, 2500baseX_Full);
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- } else {
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- phylink_set(mask, 1000baseT_Full);
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- phylink_set(mask, 1000baseX_Full);
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- }
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+ /* Half-duplex at speeds higher than 100Mbit is unsupported */
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+ phylink_set(mask, 1000baseT_Full);
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+ phylink_set(mask, 1000baseX_Full);
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if (!phy_interface_mode_is_8023z(state->interface)) {
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/* 10M and 100M are only supported in non-802.3z mode */
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