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b672550b32
This adds "syscon" to the compatible properties for the eth0/eth1 nodes in ar7100.dtsi. Without this, a kernel panic is encountered on boot with some ar7100 boards. This for some reason wasn't an issue for the WNDR3800, which uses a Realtek switch chipset, but the panic was encountered on the RouterStation Pro (using an AR8216 switch) and some other boards that haven't yet been merged. The panic message mentions an unaligned access and happens in ag71xx_mdio_probe in drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c. Even if the unaligned access is fixed, the ag71xx_mdio probe still fails without the "syscon" property. This was already being worked around in ar7161_ubnt_routerstation-pro.dts by overriding the compatible property, so this commit removes that as well. All of the other ath79 .dtsi already have this property, so no changes are needed elsewhere. Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
218 lines
4.1 KiB
Plaintext
218 lines
4.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/clock/ath79-clk.h>
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#include "ath79.dtsi"
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/ {
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compatible = "qca,ar7100";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips24Kc";
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clocks = <&pll ATH79_CLK_CPU>;
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reg = <0>;
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};
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};
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ahb {
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apb {
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ddr_ctrl: memory-controller@18000000 {
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compatible = "qca,ar7100-ddr-controller";
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reg = <0x18000000 0x100>;
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#qca,ddr-wb-channel-cells = <1>;
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};
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uart: uart@18020000 {
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compatible = "ns16550a";
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reg = <0x18020000 0x20>;
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interrupts = <3>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "uart";
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reg-io-width = <4>;
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reg-shift = <2>;
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no-loopback-test;
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status = "disabled";
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};
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usb_phy: usb-phy@18030000 {
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compatible = "qca,ar7100-usb-phy";
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reg = <0x18030000 0x10>;
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reset-names = "usb-phy", "usb-host", "usb-ohci-dll";
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resets = <&rst 4>, <&rst 5>, <&rst 6>;
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#phy-cells = <0>;
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status = "disabled";
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};
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gpio: gpio@18040000 {
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compatible = "qca,ar7100-gpio";
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reg = <0x18040000 0x30>;
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interrupts = <2>;
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ngpios = <16>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pll: pll-controller@18050000 {
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compatible = "qca,ar7100-pll", "syscon";
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reg = <0x18050000 0x20>;
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clock-names = "ref";
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/* The board must provides the ref clock */
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#clock-cells = <1>;
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clock-output-names = "cpu", "ddr", "ahb";
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};
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wdt: wdt@18060008 {
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compatible = "qca,ar7130-wdt";
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reg = <0x18060008 0x8>;
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interrupts = <4>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "wdt";
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};
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pci_intc: interrupt-controller@18060018 {
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compatible = "qca,ar7100-misc-intc";
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reg = <0x18060018 0x4>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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rst: reset-controller@18060024 {
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compatible = "qca,ar7100-reset";
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reg = <0x18060024 0x4>;
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#reset-cells = <1>;
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};
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pcie0: pcie-controller@180c0000 {
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compatible = "qca,ar7100-pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0x0>;
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reg = <0x17010000 0x100>;
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reg-names = "cfg_base";
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ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */
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0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
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interrupt-parent = <&pci_intc>;
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interrupts = <4>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 0>;
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interrupt-map = <0x8800 0 0 0 &pci_intc 0
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0x9000 0 0 0 &pci_intc 1
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0x9800 0 0 0 &pci_intc 2>;
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status = "disabled";
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};
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};
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};
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usb2: usb@1b000000 {
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compatible = "generic-ehci";
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reg = <0x1b000000 0x1000>;
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interrupt-parent = <&cpuintc>;
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interrupts = <3>;
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phy-names = "usb-phy";
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phys = <&usb_phy>;
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has-synopsys-hc-bug;
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status = "disabled";
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};
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usb1: usb@1c000000 {
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compatible = "generic-ohci";
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reg = <0x1c000000 0x1000>;
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interrupt-parent = <&miscintc>;
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interrupts = <6>;
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phy-names = "usb-phy";
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phys = <&usb_phy>;
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status = "disabled";
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};
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spi: spi@1f000000 {
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compatible = "qca,ar7100-spi";
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reg = <0x1f000000 0x10>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "ahb";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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&cpuintc {
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qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
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qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
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<&ddr_ctrl 0>, <&ddr_ctrl 1>;
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};
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&miscintc {
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compatible = "qca,ar7100-misc-intc";
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};
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ð0 {
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compatible = "qca,ar7100-eth", "syscon";
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reg = <0x19000000 0x200
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0x18070000 0x4>;
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pll-data = <0x00110000 0x00001099 0x00991099>;
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pll-reg = <0x4 0x10 17>;
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pll-handle = <&pll>;
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phy-mode = "rgmii";
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resets = <&rst 9>;
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reset-names = "mac";
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qca,mac-idx = <0>;
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};
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&mdio1 {
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builtin-switch;
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};
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ð1 {
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compatible = "qca,ar7100-eth", "syscon";
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reg = <0x1a000000 0x200
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0x18070004 0x4>;
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pll-data = <0x00110000 0x00001099 0x00991099>;
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pll-reg = <0x4 0x14 19>;
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pll-handle = <&pll>;
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phy-mode = "rgmii";
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resets = <&rst 13>;
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reset-names = "mac";
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qca,mac-idx = <1>;
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};
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