mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-10-20 22:48:10 +02:00
283 lines
8.4 KiB
Diff
283 lines
8.4 KiB
Diff
--- a/drivers/net/wireless/ath/ath9k/hw.h
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+++ b/drivers/net/wireless/ath/ath9k/hw.h
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@@ -765,6 +765,8 @@ struct ath_hw {
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int coarse_low[5];
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int firpwr[5];
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enum ath9k_ani_cmd ani_function;
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+ struct ath_cycle_counters cc, cc_delta;
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+ int32_t listen_time;
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/* Bluetooth coexistance */
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struct ath_btcoex_hw btcoex_hw;
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--- a/drivers/net/wireless/ath/ath9k/ani.c
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+++ b/drivers/net/wireless/ath/ath9k/ani.c
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@@ -549,47 +549,15 @@ static u8 ath9k_hw_chan_2_clockrate_mhz(
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static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah)
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{
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- struct ar5416AniState *aniState;
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- struct ath_common *common = ath9k_hw_common(ah);
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- u32 txFrameCount, rxFrameCount, cycleCount;
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- int32_t listenTime;
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-
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- txFrameCount = REG_READ(ah, AR_TFCNT);
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- rxFrameCount = REG_READ(ah, AR_RFCNT);
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- cycleCount = REG_READ(ah, AR_CCCNT);
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-
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- aniState = ah->curani;
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- if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) {
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- listenTime = 0;
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- ah->stats.ast_ani_lzero++;
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- ath_print(common, ATH_DBG_ANI,
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- "1st call: aniState->cycleCount=%d\n",
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- aniState->cycleCount);
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- } else {
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- int32_t ccdelta = cycleCount - aniState->cycleCount;
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- int32_t rfdelta = rxFrameCount - aniState->rxFrameCount;
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- int32_t tfdelta = txFrameCount - aniState->txFrameCount;
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- int32_t clock_rate;
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-
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- /*
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- * convert HW counter values to ms using mode
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- * specifix clock rate
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- */
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- clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000;;
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+ int32_t listen_time;
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+ int32_t clock_rate;
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- listenTime = (ccdelta - rfdelta - tfdelta) / clock_rate;
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+ ath9k_hw_update_cycle_counters(ah);
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+ clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000;
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+ listen_time = ah->listen_time / clock_rate;
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+ ah->listen_time = 0;
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- ath_print(common, ATH_DBG_ANI,
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- "cyclecount=%d, rfcount=%d, "
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- "tfcount=%d, listenTime=%d CLOCK_RATE=%d\n",
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- ccdelta, rfdelta, tfdelta, listenTime, clock_rate);
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- }
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-
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- aniState->cycleCount = cycleCount;
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- aniState->txFrameCount = txFrameCount;
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- aniState->rxFrameCount = rxFrameCount;
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-
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- return listenTime;
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+ return listen_time;
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}
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static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
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@@ -1041,45 +1009,52 @@ void ath9k_hw_disable_mib_counters(struc
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}
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EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
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-u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah,
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- u32 *rxc_pcnt,
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- u32 *rxf_pcnt,
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- u32 *txf_pcnt)
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+void ath9k_hw_update_cycle_counters(struct ath_hw *ah)
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{
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- struct ath_common *common = ath9k_hw_common(ah);
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- static u32 cycles, rx_clear, rx_frame, tx_frame;
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- u32 good = 1;
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+ struct ath_cycle_counters cc;
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+ bool clear;
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- u32 rc = REG_READ(ah, AR_RCCNT);
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- u32 rf = REG_READ(ah, AR_RFCNT);
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- u32 tf = REG_READ(ah, AR_TFCNT);
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- u32 cc = REG_READ(ah, AR_CCCNT);
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+ memcpy(&cc, &ah->cc, sizeof(cc));
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- if (cycles == 0 || cycles > cc) {
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- ath_print(common, ATH_DBG_ANI,
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- "cycle counter wrap. ExtBusy = 0\n");
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- good = 0;
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- } else {
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- u32 cc_d = cc - cycles;
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- u32 rc_d = rc - rx_clear;
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- u32 rf_d = rf - rx_frame;
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- u32 tf_d = tf - tx_frame;
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-
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- if (cc_d != 0) {
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- *rxc_pcnt = rc_d * 100 / cc_d;
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- *rxf_pcnt = rf_d * 100 / cc_d;
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- *txf_pcnt = tf_d * 100 / cc_d;
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- } else {
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- good = 0;
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- }
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- }
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+ /* freeze counters */
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+ REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
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- cycles = cc;
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- rx_frame = rf;
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- rx_clear = rc;
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- tx_frame = tf;
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+ ah->cc.cycles = REG_READ(ah, AR_CCCNT);
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+ if (ah->cc.cycles < cc.cycles) {
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+ clear = true;
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+ goto skip;
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+ }
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+
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+ ah->cc.rx_clear = REG_READ(ah, AR_RCCNT);
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+ ah->cc.rx_frame = REG_READ(ah, AR_RFCNT);
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+ ah->cc.tx_frame = REG_READ(ah, AR_TFCNT);
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+
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+ /* prevent wraparound */
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+ if (ah->cc.cycles & BIT(31))
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+ clear = true;
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+
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+#define CC_DELTA(_field, _reg) ah->cc_delta._field += ah->cc._field - cc._field
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+ CC_DELTA(cycles, AR_CCCNT);
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+ CC_DELTA(rx_frame, AR_RFCNT);
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+ CC_DELTA(rx_clear, AR_RCCNT);
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+ CC_DELTA(tx_frame, AR_TFCNT);
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+#undef CC_DELTA
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+
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+ ah->listen_time += (ah->cc.cycles - cc.cycles) -
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+ ((ah->cc.rx_frame - cc.rx_frame) +
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+ (ah->cc.tx_frame - cc.tx_frame));
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+
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+skip:
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+ if (clear) {
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+ REG_WRITE(ah, AR_CCCNT, 0);
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+ REG_WRITE(ah, AR_RFCNT, 0);
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+ REG_WRITE(ah, AR_RCCNT, 0);
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+ REG_WRITE(ah, AR_TFCNT, 0);
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+ memset(&ah->cc, 0, sizeof(ah->cc));
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+ }
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- return good;
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+ /* unfreeze counters */
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+ REG_WRITE(ah, AR_MIBC, 0);
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}
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/*
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--- a/drivers/net/wireless/ath/ath9k/ani.h
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+++ b/drivers/net/wireless/ath/ath9k/ani.h
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@@ -93,6 +93,13 @@ struct ath9k_mib_stats {
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u32 beacons;
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};
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+struct ath_cycle_counters {
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+ u32 cycles;
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+ u32 rx_frame;
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+ u32 rx_clear;
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+ u32 tx_frame;
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+};
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+
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/* INI default values for ANI registers */
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struct ath9k_ani_default {
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u16 m1ThreshLow;
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@@ -130,9 +137,6 @@ struct ar5416AniState {
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int32_t rssiThrLow;
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int32_t rssiThrHigh;
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u32 noiseFloor;
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- u32 txFrameCount;
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- u32 rxFrameCount;
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- u32 cycleCount;
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u32 ofdmPhyErrCount;
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u32 cckPhyErrCount;
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u32 ofdmPhyErrBase;
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@@ -166,8 +170,7 @@ struct ar5416Stats {
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void ath9k_enable_mib_counters(struct ath_hw *ah);
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void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
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-u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah, u32 *rxc_pcnt,
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- u32 *rxf_pcnt, u32 *txf_pcnt);
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+void ath9k_hw_update_cycle_counters(struct ath_hw *ah);
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void ath9k_hw_ani_setup(struct ath_hw *ah);
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void ath9k_hw_ani_init(struct ath_hw *ah);
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int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
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--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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@@ -1227,8 +1227,7 @@ static bool ar5008_hw_ani_control_old(st
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aniState->firstepLevel,
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aniState->listenTime);
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ath_print(common, ATH_DBG_ANI,
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- "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
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- aniState->cycleCount,
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+ "ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
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aniState->ofdmPhyErrCount,
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aniState->cckPhyErrCount);
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@@ -1480,15 +1479,13 @@ static bool ar5008_hw_ani_control_new(st
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ath_print(common, ATH_DBG_ANI,
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"ANI parameters: SI=%d, ofdmWS=%s FS=%d "
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- "MRCcck=%s listenTime=%d CC=%d listen=%d "
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+ "MRCcck=%s listenTime=%d "
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"ofdmErrs=%d cckErrs=%d\n",
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aniState->spurImmunityLevel,
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!aniState->ofdmWeakSigDetectOff ? "on" : "off",
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aniState->firstepLevel,
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!aniState->mrcCCKOff ? "on" : "off",
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aniState->listenTime,
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- aniState->cycleCount,
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- aniState->listenTime,
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aniState->ofdmPhyErrCount,
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aniState->cckPhyErrCount);
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return true;
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@@ -1581,8 +1578,6 @@ static void ar5008_hw_ani_cache_ini_regs
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aniState->firstepLevel = ATH9K_ANI_FIRSTEP_LVL_NEW;
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aniState->ofdmWeakSigDetectOff = !ATH9K_ANI_USE_OFDM_WEAK_SIG;
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aniState->mrcCCKOff = true; /* not available on pre AR9003 */
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-
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- aniState->cycleCount = 0;
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}
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static void ar5008_hw_set_nf_limits(struct ath_hw *ah)
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--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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@@ -1005,15 +1005,13 @@ static bool ar9003_hw_ani_control(struct
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ath_print(common, ATH_DBG_ANI,
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"ANI parameters: SI=%d, ofdmWS=%s FS=%d "
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- "MRCcck=%s listenTime=%d CC=%d listen=%d "
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+ "MRCcck=%s listenTime=%d "
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"ofdmErrs=%d cckErrs=%d\n",
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aniState->spurImmunityLevel,
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!aniState->ofdmWeakSigDetectOff ? "on" : "off",
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aniState->firstepLevel,
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!aniState->mrcCCKOff ? "on" : "off",
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aniState->listenTime,
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- aniState->cycleCount,
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- aniState->listenTime,
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aniState->ofdmPhyErrCount,
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aniState->cckPhyErrCount);
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return true;
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@@ -1116,8 +1114,6 @@ static void ar9003_hw_ani_cache_ini_regs
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aniState->firstepLevel = ATH9K_ANI_FIRSTEP_LVL_NEW;
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aniState->ofdmWeakSigDetectOff = !ATH9K_ANI_USE_OFDM_WEAK_SIG;
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aniState->mrcCCKOff = !ATH9K_ANI_ENABLE_MRC_CCK;
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-
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- aniState->cycleCount = 0;
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}
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void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
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@@ -1232,7 +1228,7 @@ void ar9003_hw_bb_watchdog_read(struct a
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void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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- u32 rxc_pcnt = 0, rxf_pcnt = 0, txf_pcnt = 0, status;
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+ u32 status;
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if (likely(!(common->debug_mask & ATH_DBG_RESET)))
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return;
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@@ -1261,11 +1257,13 @@ void ar9003_hw_bb_watchdog_dbg_info(stru
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"** BB mode: BB_gen_controls=0x%08x **\n",
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REG_READ(ah, AR_PHY_GEN_CTRL));
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- if (ath9k_hw_GetMibCycleCountsPct(ah, &rxc_pcnt, &rxf_pcnt, &txf_pcnt))
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+ ath9k_hw_update_cycle_counters(ah);
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+#define PCT(_field) (ah->cc_delta._field * 100 / ah->cc_delta.cycles)
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+ if (ah->cc_delta.cycles)
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ath_print(common, ATH_DBG_RESET,
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"** BB busy times: rx_clear=%d%%, "
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"rx_frame=%d%%, tx_frame=%d%% **\n",
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- rxc_pcnt, rxf_pcnt, txf_pcnt);
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+ PCT(rx_clear), PCT(rx_frame), PCT(tx_frame));
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ath_print(common, ATH_DBG_RESET,
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"==== BB update: done ====\n\n");
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