Combine all bus operations for one MMD access in one function.
Protecting all these bus operations with one lock also helps
to avoid potential issues due to bus operations intercepting
the register and data write.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48914
The default TTL for address resolution table entries is 5 minutes
for all members of the AR8216 family. This can cause issues if
e.g. Wifi clients roam to another AP and their MAC appears on
another switch port suddenly. Then the client may not be reachable
until the old ARL entry expires.
I would have expected the switch to invalidate old entries if it
detects the same MAC on another port. But that's not the case.
Therefore make the TTL for ARL entries configurable.
The effective TTL will always be a multiple of 7 seconds.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48913
The line before includes the port number anyway so there's no need
to duplicate the port number in the MIB info header.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48912
The decimal values especially for TxByte and RxGoodByte are hard to read
once bigger amounts of data have been transferred.
Therefore complement the decimal values with info in GiB / MiB / KiB.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48911
For unused switch ports all MIB values are zero. Displaying ~40 empty
MIB counters is just confusing and makes it hard to read the output of
swconfig dev <dev> show.
Therefore, if all MIB counters for a port are zero, just display
an info that the MIB counters are empty.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 48910
Enable platform-supplied WLAN LED name for ath9k device.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Acked-by: Hartmut Knaack <knaack.h@gmx.de>
SVN-Revision: 48879
This patch adds speed_mask special file to LEDs connected to switch ports
via 'switch' trigger. It allows to choose which speeds to signal when link
is up. If router has more than one LED per port, they may light up
differently depending on how fast connection is. Default setting is 'all
speeds' so backward compatibility with system scripts (for example uci) is
maintained.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48775
This patch changes swconfig_trig_port_mask_store() handler to utilize
kstrtoul() function instead of call to obsolete simple_strtoul(). Thanks
to this change, new handler takes less memory and makes port_mask special
file accept not only hexadecimal, but also decimal and octal numbers.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48774
Seama format has 2 similar headers: container (seal) header and entity
header. The first one has size always set to 0 and doesn't contain MD5
digest.
When dealing with Seama on a flash we deal directly with an entity. You
can see mtdsplit_parse_seama reads from offset 0 and expects entity to
be there. Seama container is used by bootloader / interface only which
extract entity out of it and flash it.
That said we should fix our header struct. This is important as we
calculate possible rootfs offset assuming it may be placed right after
Seama entity. So far calculate offset was always 16B too low.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48754
When dealing with Broadcom hardware we can simply use swconfig's generic
helper, we just need to do some validation of requested state.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48623
Thanks to this change swconfig can access port PHYs e.g. when setting
port link state with a generic helper.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48622
It's quite common for switches to have PHY per port so adding a generic
helper setting link state will help many drivers. It just needs an API
to access PHYs which this patch also adds.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48621
Some D-Link routers (e.g. DIR-885L) have NAND and use Seama format. It
means OpenWrt will want to have UBI in Sseama entity and should be able
to detect it.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48600
Our mtdsplit parsers may want to create partition with name choice based
on partition file system (e.g. SquashFS vs. JFFS2). This patch allows
passing extra argument pointing to variable that will be set properly.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48598
Rename kernel_size variable as it includes whole entity size, not just a
kernel size. Also update comments to match it and describe better what
are we checking/looking for.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48480
Directly return the return value of genl_register_family_with_ops()
instead of storing it in a temporary variable, then returning it.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48472
BCM531x5 has two pontential cpu ports, and header mode can be enabled
independently on both.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48302
This add support for IGMP Snooping on atheros switches (disabled by default),
which avoids flooding the network with multicast data.
Tested on TL-WDR4300: disabling IGMP Snooping results in multicast flooding
on each specific port, enabling it back again prevents each port from
receiving all multicast packets.
Partially based on: http://patchwork.ozlabs.org/patch/418122/
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 48268
On most image types the rootfs ends at an erase-block. However, at least
with brnImages this is not the case: while the partitions are aligned
with the erase-block size there is a 12 byte footer at the end of the
partition which must not be touched by any filesystem. This lead to a
rootfs_data partition which was not aligned properly (and thus ended up
being readonly):
0x000000480000-0x00000085a800 : "rootfs_data" (128 KiB EB)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48263
This allows splitting EVA images (usually found in fritz devices). The
firmware will be split into a kernel and a separate rootfs partition.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48262
This adds brnImage (used with the brnboot bootloader) firmware parsing
support. brnboot verifies the integrity of the firmware stored on the
"Code Image" partitions by looking at the 12 byte footer at the very end
of the partition. This footer contains the checksum of the original
brnImage (kernel + rootfs/squashfs) and must not be touched (by our JFFS2
rootfs_data - otherwise the image will not be bootable anymore).
Big thanks to Mathias Kresin for analyzing the brnImage structure and
finding out the information how to keep images valid even when adding a
nested rootfs_data partition.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48261
Some switches can force link speed for a port. Let's add API that will
allow drivers to export this feature.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48142
This fixes regression introduced in my recent ledtrig-netdev commit.
Events triggered by different interfaces were stopping timer so it
wasn't working for tx/rx mode.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 48072
The ppp0 interface is renamed after the connection is established. Due
to a missing NETDEV_REGISTER event, the ledtrig-netdev isn't aware of
the renamed interface and literally ignores the device
(no tx/rx indication, led isn't switched off with 'ifdown wan').
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48048
As explained earlier, using SWITCH_TYPE_LINK gives more flexibility,
it doesn't require e.g. string parsing to read some data.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 47999
So far we were sending link data as a string. It got some drawbacks:
1) Didn't allow writing clean user space apps reading link state. It was
needed to do some screen scraping.
2) Forced whole PORT_LINK communication to be string based. Adding
support for *setting* port link required passing string and parting
it in the kernel space.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 47997
Previously switching to non-existing device (interface) could result in
leaving LED on.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 47990
We may just delete timer on every trigger update and then start it again
if needed. This will let us avoid both: races and locking in frequently
called timer callback.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 47987
Read/write lock was adding useless complexity, there wasn't any real
gain in case of this driver.
Also switch to _bh variants to avoid deadlocks.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 47986
All supported kernels require patching ledtrig-netdev in the same way,
so it's safe to just move these changes to the base version of this
driver. We needed these patches for some old kernels 2.6.36 and 3.11.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 47962
In r45970 the MAC swap handling was made opt-in, however some boards
have been forgotten during the conversion. Since the reference design
uses this MAC swapping, and pretty much all known boards using this chip
seem to do so too, enabling the swapping is a more reasonable default
than leaving it disabled.
Change the code to still allow boards to opt-out of this.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47956
Kernel 3.14 added aditional genphy_soft_reset phy reset to phy_init_hw in drivers/net/phy/phy_device.c
Since adm6996 does in driver soft reset and doesn't use BMCR_RESET for soft reset
add dummy soft_reset callback to adm6996 driver, like it is done in ar8216.
This fixes ticket #20147
Signed-off-by: Andrej Vlasic <andrej.vlasic0@gmail.com>
SVN-Revision: 47272
The previous "link" and "status" functions were non-standard,
and thus less useful for parsing.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 46864
This also clears any bootloader-set FDB defaults. This had
caused issues creating port-based VLANs when mappings
overlapped previous VLANs. Packets destined to a port
not in the default port group flooded all ports.
Tested on a 88E6171 (Linksys EA4500) and 88E6172 ('1900AC)
Signed-off-by: Claudio Leite <leitec@staticky.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
SVN-Revision: 46699
no-op since 2.6.35
removed in Kernel 4.1
see https://lwn.net/Articles/380931/
Signed-off-by: Dirk Neukirchen <dirkneukirchen@web.de>
SVN-Revision: 46671
In addition to the update this also fixes compile problems with kernel 4.1.
This closes #20323.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 46609
If a link goes down, don't flush the complete ARL table.
Only flush the entries for the respective port.
Don't touch ARL table if a link goes up.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 46381
Adds functions for flushing ARL table entries per port.
Successfully tested on AR8327. Implementation for AR8216/AR8236/AR8316
is based on the AR8236 datasheet and assumes that the three chips
share a common ATU register layout.
Compile-tested only for AR8216/AR8236/AR8316.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 46380
Adds the chip-specific part of reading ARL table for AR8216/AR8236/AR8316.
It's based on the AR8236 datasheet and compile-tested only as I couldn't
find datasheets for AR8216/AR8316 and don't own devices with these chips.
The existing ar8216_atu_flush implementation was used for all three
chip types, therefore I guess they share a common ATU register layout.
More testing would be appreciated.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 46379
To improve reproducibility, prevent the inclusion of timestamps
in the gzip header.
Signed-off-by: Reiner Herrmann <reiner@reiner-h.de>
SVN-Revision: 46361
The position of the nvram header file on brcm47xx changed with kernel
version 4.1.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 46170
On two tested devices: Netgear R6250 (BCM53011 rev 2) and Luxul XWC-1000
(BCM53011 rev 3) it was possible to use port 7 and eth1 (instead of port
5 and eth0). It seems BCM53011 just like BCM53012 has 8 ports and
usually 3 of them are connected to the SoC.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 46104
AR8337 supports a configuration bit to swap MAC0 and MAC6.
Currently this is set in general if an AR8337 is detected and causes
issues with devices using an AR8334 (internally an AR8337, just
less chip pins).
And it might even cause issues with AR8337-based devices with
different board designs.
Swapping the MAC's however isn't needed for AR8337 in general.
It's just needed in case of certain board designs (affected devices
seem to be based on Atheros reference board AP135/136-010).
Therefore this configuration bit should be moved to platform data.
The patch includes the needed changes to the device initialization
code of affected devices. Hopefully I didn't miss any ..
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 45970
On device reset the sizes for the vlan and port tables were wrongly
calculated based on the pointer size instead of the struct size. This
causes buffer overruns on 64 bit targets, resulting in panics.
Fix this by dereferencing the pointers.
Reported-by: Fedor Konstantinov <blmink@mink.su>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45938
At least on my b53 chip, the mask is 3 bits wide, and because
of this some STP states are not set properly and discarded when read.
Maybe for some other chips it makes sense to have just 2 bits width,
but I don't have other versions around to test/validate.
If that's the case then maybe we could add another STP state mask.
Signed-off-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45937
This chipset has at least 8 usable ports, e.g. Netgear R8000 has ports
5, 7 and 8 connected to Ethernet interfaces:
vlan1ports=0 1 2 3 5 7 8*
vlan2ports=4 8u
Port 6 seems to be always disabled.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45676
On BCM5301X there are two different cases to handle: CPU port 8 vs. any
other one. Support for CPU port 8 was already partially implemented but
it lacked setting some extra bit for 2G speed. It also will need to be
extended to implement "SMP dual core 3 GMAC setup". That's the reason
for handling it in separated code block.
This patch also adds overriding CPU port state for port other than 8. It
requires using recently defined GMII_PORT registers.
It was tested for regressions on BCM53011 revs 2 & 3. It was also
confirmed to fix switch on some internal Broadcom board.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45402
* properly enclose macro arguments in paranthesis on use
* remove trailing white space
* convert C99 // comments
* add missing blank lines after declaration
* remove braces from single statement blocks
* split lines > 80 chars (except for one)
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 45356
Use the latest version of the yaffs code. Fetched from the
yaffs2 git tree and it is based on the following commit:
commit 7e5cf0fa1b694f835cdc184a8395b229fa29f9ae
Author: Charles Manning <cdhmanning@gmail.com>
Date: Thu Aug 7 11:25:05 2014 +1200
yaffs-direct: Basic tests. Add lpthread flag for background gc support
Signed-off-by: Charles Manning <cdhmanning@gmail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 45188
If this option is enabled, the FIT image format will be detected and
split by the mtdsplit code. Detection is based upon the FDT magic, which
will trigger the parsing and detection of the rootfs, ending-up in the
creation of the 2 new partitions.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 44792
It will now actually enable the mib counters instead of enabling rx/tx for
the first switch port.
Reported-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44788
For bcm63xx integrated switches, broadcom changed the data endianess
to match the system endianess. But this only applies to within one word,
which causes 48/64 bit values to be still split into their "litte endian"
groups.
E.g. 48 bit values (with 5 being the most significant byte) aligned
0x00 ..01 or 0123
0x04 2345 45..
will become
0x00 ..10 resp. 3210
0x04 5432 54..
Likewise for 64 bit values.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44568
We shouldn't read data directly into the header struct, as some devices
(e.g. Edimax) need more bytes due to some extra header.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 44414
Some devices have uImage headers after some extra headers (e.g. Edimax
devices). To support such cases our verify callback function should be
allowed to return header offset, not just a boolean value.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 44412
drivers/net/phy/adm6996.c:881:5: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'u32' [-Wformat=]
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 44333
The board is already supported by OpenWrt. WNR1000v2/WNR1000v2-VC are
pretty much the same as WNR2000v3/WNR612v2, therefore the same
initialization code and flash layout is used.
Signed-off-by: Ștefan Rusu <saltwaterc@gmail.com>
Tested-by: Douglas Fraser <1dsfraser@gmail.com>
SVN-Revision: 44221
Add global read-only swconfig attribute "arl_table" to display the
address resolution table.
So far the chip-specific part is implemented for AR8327/AR8337 only
as I don't have the datasheets for the other AR8XXX chips.
Successfully tested on TL-WDR4300 (AR8327rev2)
and TL-WDR4900 (AR8327rev4).
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44104
Until a few years ago the page switch wait time was set to msleep(1)
what was changed to usleep_range(1000, 2000) later.
I can not imagine that a low-level operation like switching page
on register level takes so much time.
Most likely the value of 1ms was initially set to check whether
it fixes an issue and then remained w/o further checking whether
also a smaller value would be sufficient.
Now the wait time is set to 5us and I successfully tested this on
AR8327. IMHO 5us should be plenty of time for all supported chips.
However I couldn't test this due to missing hardware.
If other chips should need a longer wait time we can add the
wait time as a parameter to the ar8xxx_chip struct.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44103
Check for switch port link changes and
- flush ATU in case of a change
- report link change via syslog
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44102
The functionality to flush the address translation table contains two bugs
which luckily compensate each other.
1. Just setting the operation is not sufficient to perform the flushing.
The "active" bit needs to be set to actually trigger an action.
For the vtu operations this is implemented correctly.
2. ar8xxx_phy_read_status is called every 2s by the phy state machine
to check for link changes. This would have caused an ATU flush
every 2s.
Fix the chip-specific ATU flush functions and remove the ATU flush call
from ar8xxx_phy_read_status.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44101
The swconfig get_link attribute (at least) on AR8327/AR8337 doesn't
consider the autonegotiated flow control.
AR8327/AR8337 provide the info about autonegotiated rx/tx flow control
in bits 10 and 11 of the port status register.
Use these values to display info about autonegotiated rx/tx flow
control as part of the get_link attribute.
Successfully tested on TL-WDR4900 (AR8327 rev.4) and
TL-WDR4300 (AR8327 rev.2).
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44023
AR8327/AR8337 allow to read the result of EEE autonegotiation.
If EEE is autonegotiated between the link partners, display
this as part of the swconfig get_link attribute.
eee100: 100MBit EEE supported by both link partners
eee1000: 1GBit EEE supported by both link partners
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44022
Users reported network issues with AR8327 which turned out to be caused
by EEE not working correctly with certain link partners (ticket 14597).
The workaround was to disable EEE on all ports (changeset 41577).
The issue was with certain link partners only, therefore this patch
allows to control usage of EEE per port via swconfig.
Still the default is to initially disable EEE on all ports.
Successfully tested on a TL-WDR4900 (AR8327 rev.4)
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44021
Since the driver doesn't know anything about (M)STP
we just hard-set the ports to be enabled if they are
part of the VLAN.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43938
- eliminate MV_CPUPORT; not necessary since we define
the CPU port(s) via Device Tree
- add STU and expand VTU operations
- update register names to match those of 88E61xx rather than
mvswitch's 88E6060
- use more consistent formatting
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43937
Move all AR8327/AR8337-specific driver code into a separate source file
ar8327.c and adjust patches so that ar8327.c is compiled if
CONFIG_AR8216_PHY is set.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43845
Move several structure definitions and #defines from ar8216.c
to ar8216.h and move AR8327/AR8337 header stuff into a new
header file ar8327.h.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43844
Remove read/write/rmw member functions from ar8xxx_priv
There seems to be no real benefit of the ar8xxx_priv member functions
read/write/rmw as one implementation exists for each of them only.
Especially ar8xxx_mii_rmw is assigned to priv->rmw first and then
mapped to ar8xxx_rmw.
Rename the ar8xxx_mii_.. functions to ar8xxx_.. and use them directly.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43742
Create helpers mii_read32 / mii_write32 for 32 bit MII ops.
Rename r3 variable to page in ar8xxx_mii_write to make it consistent
with the other ar8xxx_mii_xxxx functions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43741
Factor out chip-specific parameters from ar8xxx_probe_switch.
Move the ar8xxx_chip definitions after the swops definitions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43740
This is a swconfig driver for the Marvell 88E6171 switch,
which is a 7-port GigE switch with two CPU ports and 64
802.1q VLANs.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43486
Factor out set_mirror_regs to ar8xxx_chip.
Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43468
Factor out info whether switch should be configured at probe stage
to ar8xxx_chip. Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43466
Patch reverts 43332 which seems to cause issues with VLAN functionality.
Add a specific check to check whether ANEG is still enabled and re-enable
it if necessary. Disable generic phy soft reset for kernel >=3.16.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43356
We should make sure that also for ar8216 hw gets initialized.
For ar8216 hw_init is a dummy currently. The hw_init used for ar8236
should be generic enough to be usable with ar8216 too.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43334
Move the PHY fixup call to the PHY init loop.
Use ar8xxx_has_gige in the PHY init instead of passing the gigE
capability via function parameter.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43333
Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy
causing BMCR_ANENABLE to get cleared.
Due to the fact that ar8xxx_phy_config_aneg does nothing for
PHY 0 autonegatiation support remains disabled.
This can cause ports to operate at 10MBit/half-duplex only.
Fix this by calling genphy_config_aneg for PHY 0 too as
genphy_config_aneg sets BMCR_ANENABLE if it's not yet set.
Fixes: ticket 17800
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43332
PHY init code in the switch-specific hw_init functions is mainly
identical. Factor it out into a generic ar8xxx_phy_init function.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43331
Move phy fixup code from the chip-specific hw_init functions into a
fixup_phys callback.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43330
Currently there is a fixed 1000ms wait time after the switch was reset.
Most if not all switches need much less time to perform a reset.
Therefore replace the fixed wait time with polling for BMCR_RESET to
be cleared.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43329
All supported switches have 5 PHYs. Currently partially 5 is hardcoded
and partially switch-specific constants exist.
Replace them with a global constant.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43328
Boards that have more than one swconfig enabled switch will show the devices in
reverse order when call swconfig list. Fix this by using list_add_tail().
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 43106
This allows tagged and untagged traffic together on the same port on ar8327
switch devices.
I looked at the first attempt to do this in r40777 (ar71xx: Fix tagged+untagged
operation on AR8327N (#12181)). I also set the vlan and port egress policies
like that change. But I change vlan_tagged in an less intrusive way. The
tagged/untagged decision is now based on the following rules:
- if vid != pvid then traffic is always tagged
- if vid == pvid then vlan_tagged stores if the traffic should be tagged
Tested on TP-Link WDR-3600 (ar8327N).
Signed-off-by: Valentin Spreckels <Valentin.Spreckels@Informatik.Uni-Oldenburg.DE>
SVN-Revision: 42653
This moves ingress, egress policy and pvid decisions to setup_port methods.
They arenow device type dependent.
This allows policy changes on only one device type which is needed to allow
tagged + untagged operation on ar8327.
Tested on TP-LINK WDR-3600 (ar8327N).
Signed-off-by: Valentin Spreckels <Valentin.Spreckels@Informatik.Uni-Oldenburg.DE>
SVN-Revision: 42652
There are pretty many OpenWrt patches against mtd subsystem resulting
in a bit of mess and growing maintenance cost.
My idea is to use an extra "mtdsplit" directory with OpenWrt specific
files (including Kconfig).
This is the first step to achieve this. This patch adds a "mtdsplit"
directory with Kconfig and replaces 4 patches with a single one.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42287
According to the thread https://forum.openwrt.org/viewtopic.php?id=48281
b53 uses GPIO 7:
[ 4.470000] b53_common: [DBG] b53_switch_reset_gpio using 7
and causes device to self-reboot. GPIO 8 was found in CFE boot log:
"Reset switch via GPIO 8 ..."
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 41526
This patch deactivates the statistics, adds a missing lock
initialization and fixes a waring.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 41511
Revert the tagged + untagged rework for now due to regressions in
vlan setup on certain AR83xx switches.
Signed-off-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 40842
Replace the global "vlan_tagged" variable with an array storing the
tagging state per vlan.
The code was taken from #12181, tested and cleaned up by Saverio Proto
with additional bug fixes supplied by Álvaro Fernández.
Tested-by: Jo-Philipp Wich <jow@openwrt.org>
Signed-off-by: Saverio Proto <zioproto@gmail.com>
Signed-off-by: Álvaro Fernández <noltari@gmail.com>
SVN-Revision: 40777
Function register_mtd_parser always returned 0 (at least since v3.3)
before being changed to return void in v3.14-rc1~65^2~93 (mtd: make
register_mtd_parser return void), so it's not needed to check the
return value of this function. Also add __init flag to caller.
This fix compile errors in 3.14 kernel like:
drivers/mtd/mtdsplit_seama.c: In function 'mtdsplit_seama_init':
drivers/mtd/mtdsplit_seama.c:99:2: error: void value not ignored as it ought to be
return register_mtd_parser(&mtdsplit_seama_parser);
^
Signed-off-by: Zhao, Gang <gamerh2o@gmail.com>
SVN-Revision: 40731
This patch adds port status information and MIB counters to the ADM6996
switch driver.
The driver supports also the older ADM6996L-variant, but I'm not able to
test this patch on that chip. According to the datasheet the same
registers exist there as well, so I think it should work, but any
feedback is appreciated.
Signed-off-by: Matti Laakso <malaakso at elisanet.fi>
SVN-Revision: 40542
If the CPU port is not forced up, the link, at least on this board, is lost after
changes are applied. This makes sure that the link is restored. Regression tests
should confirm it doesn't break other boards.
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40305
- hide port pvid - vlan index relation
- switch initialises with vlans disabled so port isolation is not used
- remove special treatment of cpu port
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40304
Changes to:
- show the correct "enable_vlan" value under "Global attributes"
- show tagged ports under "Vlan: ports"
- use get_port_link method to report link status
Signed-off-by: Antonios Vamporakis <ant@area128.com>
SVN-Revision: 40303
Use the 'swconfig_trig_set_brightness' function to set
the brightness value of the LED when the link goes down.
This ensures that the last brighness value is saved into
a local variable which is used to track the actual LED
status.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39402
This reverts r38197.
The automatically created firmware partition includes
the partition_table partition. Apart from the partition
table, this partition contains sensitive data on some
Compex devices which data can be destroyed when the
firmware partition gets modified. Revert the change to
prevent that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39382
The HIFN driver is a PCI driver, thus requires PCI support to be enabled
to compile. Therefore let it depend on PCI..
Should fix mvebu builds.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 39357
Use the latest version of the yaffs code. Fetched from the
yaffs2 git tree and it is based on the following commit:
commit bc76682d93955cfb33051beb503ad9f8a5450578
Merge: 3a8580e ffa781d
Author: Charles Manning <cdhmanning@gmail.com>
Date: Thu Jul 11 17:46:25 2013 +1200
Merge branch 'master' of ssh://www.aleph1.co.uk/home/aleph1/git/yaffs2
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39084
This patch enables jumbo frames on AR8327 switch by default.
I have tested it on TP-Link TL-WDR3600.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 39076
This patch is needed to use the switch inside the Sitecom WLR-8100;
it was unusable and detected as Generic-Phy before.
since ar8337 is behaving like ar8327
generally do the same thing
see: https://forum.openwrt.org/viewtopic.php?pid=214218#p214218
forward-ported to trunk
Signed-off-by: Dirk Neukirchen <dirkneukirchen@web.de>
Patchwork: http://patchwork.openwrt.org/patch/4469/
[juhosg: merge chip_is_ar83[23]7 statements in ar8xxx_phy_config_init]
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 38952
The BCM5365 needs a shift of 7 bits and not 6 bits like the BCM5325 for
the untagged ports.
Thank you Russell for reporting this and testing the patch.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38793
This patch makes it possible to use adm6996.c on first generation
BCM47XX devices with ADM switches.
The GPIO bit banging protocol implementation was copied from the old
switch driver and adapted to this driver and changed to the mainline
kernel GPIO interface.
The ADM6996L is different from the ADM6996M which is supported, for
both specs are available in the Internet.
This was tested on a WRT54GS version 1.0, thank you Dirk Neukirchen for
the device.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38698
The revision is stored in a different register than it is in other
Broadcom switches.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37995
These switches are integrated in some recent BCM53XX and BCM47XX SoCs
like the BCM53572.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37994
The Linksys wrt310n v1 does not have a robo_reset config variable in
nvram, but GPIO Pin 8 is the pin needed for resetting the external
switch, Linksys hard coded it into their source code.
Thank you Devastator for testing.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37988
BCM5365 (and probably other older variants) use a different phy id, so
the phy driver never attached for them.
Fix this by adding the appropriate phy id to the fixup and the phy
driver.
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37906
b53_no_ops has no elements and b53_port_ops has one element, this makes
the code access some random memory when trying to access the mib
counter functions.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37895
The myloader partition parser code uses ifdef wrappers
to make the code usable on kernels below version 3.2.
All targets are using kernel 3.3 at least so the wraper
is not needed. Remove that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 37880
OCF_CRYPTOSOFT uses both symbols form crypto_hash and crypto_blkcipher,
so let it select these through kernel config.
Fixes the following build error:
ERROR: "crypto_alloc_ahash" [crypto/ocf/cryptosoft.ko] undefined!
ERROR: "crypto_ahash_digest" [crypto/ocf/cryptosoft.ko] undefined!
ERROR: "crypto_ahash_setkey" [crypto/ocf/cryptosoft.ko] undefined!
make[6]: *** [__modpost] Error 1
make[5]: *** [modules] Error 2
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37652
This is needed for some switches used on bcm47xx SoCs like the one on the Asus RT-N66U.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 37645
There is no platform using the gpio-pwm driver, yet these patches break the
generic PWM framework that is in upstream. So just remove them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
SVN-Revision: 37490
It hasn't been buildable for a long time, and there are no users of it
anymore left as all of them have been switched to the upstream accepted
version.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37436
This makes it possible to use swconfig to controll the switch.
This was tested with devices using b43 and bgmac.
This was not tested on devices using tg3.
This does not support the adm switch used in some very old devices.
SVN-Revision: 37304
This patch adds swlib attributes to the RTL8366RB switch/PHY found in the
TL-WR1043ND router that allow to mirror ethernet packets to a monitor port.
Signed-off-by: Colin Leitner <colin.leitner@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36847
