1
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-10-18 13:29:16 +02:00

kernel: cut broken SPI_NOR 4K eraseblock LIMIT patch

Since 4e0c54bc5bc8 ("kernel: add support for kernel 5.4"),
the spi-nor limit 4k erasesize to spi-nor chips below a configured size
patch has not functioned as intended.

For uniform erasesize SPI-NOR devices, both
nor->erase_opcode & mtd->erasesize are used in erase operations.
These are set before, and not modified by, this
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT patch.
Thus, an SPI-NOR device with CONFIG_MTD_SPI_NOR_USE_4K_SECTORS will
always use 4k erasesize (where the device supports it).

If this patch was fixed to function as intended, there would be
cases where devices change from a 4K to a 64K erasesize.

Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
This commit is contained in:
John Thomson 2021-09-28 20:51:56 +10:00 committed by Koen Vandeputte
parent aae3a8a254
commit ef69ab7a35
9 changed files with 0 additions and 149 deletions

@ -3671,7 +3671,6 @@ CONFIG_MTD_ROOTFS_ROOT_DEV=y
# CONFIG_MTD_SPI_NAND is not set
# CONFIG_MTD_SPI_NOR is not set
# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096
# CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE is not set
CONFIG_MTD_SPLIT=y
# CONFIG_MTD_SPLIT_BCM63XX_FW is not set

@ -3814,7 +3814,6 @@ CONFIG_MTD_ROOTFS_ROOT_DEV=y
CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set
# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096
# CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE is not set
CONFIG_MTD_SPLIT=y
# CONFIG_MTD_SPLIT_BCM63XX_FW is not set

@ -1,71 +0,0 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Sat, 4 Nov 2017 07:40:23 +0100
Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
flash size
Some devices need 4K sectors to be able to deal with small flash chips.
For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
entire chip is just one erase block.
On bigger flash chip sizes, using 4K sectors can significantly slow down
many operations, including using a writable filesystem. There are several
platforms where it makes sense to use a single kernel on both kinds of
devices.
To support this properly, allow configuring an upper flash chip size
limit for 4K sectors support.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -34,6 +34,17 @@ config MTD_SPI_NOR_USE_4K_SECTORS
Please note that some tools/drivers/filesystems may not work with
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
+config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
+ int "Maximum flash chip size to use 4K sectors on (in KiB)"
+ depends on MTD_SPI_NOR_USE_4K_SECTORS
+ default "4096"
+ help
+ There are many flash chips that support 4K sectors, but are so large
+ that using them significantly slows down writing large amounts of
+ data or using a writable filesystem.
+ Any flash chip larger than the size specified in this option will
+ not use 4K sectors.
+
source "drivers/mtd/spi-nor/controllers/Kconfig"
endif # MTD_SPI_NOR
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2801,6 +2801,21 @@ static void spi_nor_info_init_params(str
*/
erase_mask = 0;
i = 0;
+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+ if ((info->flags & SECT_4K_PMC) && (params->size <=
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
+ erase_mask |= BIT(i);
+ spi_nor_set_erase_type(&map->erase_type[i], 4096u,
+ SPINOR_OP_BE_4K_PMC);
+ i++;
+ } else if ((info->flags & SECT_4K) && (params->size <=
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
+ erase_mask |= BIT(i);
+ spi_nor_set_erase_type(&map->erase_type[i], 4096u,
+ SPINOR_OP_BE_4K);
+ i++;
+ }
+#else
if (info->flags & SECT_4K_PMC) {
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
@@ -2812,6 +2827,7 @@ static void spi_nor_info_init_params(str
SPINOR_OP_BE_4K);
i++;
}
+#endif
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
SPINOR_OP_SE);

@ -1,71 +0,0 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Sat, 4 Nov 2017 07:40:23 +0100
Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
flash size
Some devices need 4K sectors to be able to deal with small flash chips.
For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
entire chip is just one erase block.
On bigger flash chip sizes, using 4K sectors can significantly slow down
many operations, including using a writable filesystem. There are several
platforms where it makes sense to use a single kernel on both kinds of
devices.
To support this properly, allow configuring an upper flash chip size
limit for 4K sectors support.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -78,6 +78,17 @@ config MTD_SPI_NOR_SWP_KEEP
endchoice
+config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
+ int "Maximum flash chip size to use 4K sectors on (in KiB)"
+ depends on MTD_SPI_NOR_USE_4K_SECTORS
+ default "4096"
+ help
+ There are many flash chips that support 4K sectors, but are so large
+ that using them significantly slows down writing large amounts of
+ data or using a writable filesystem.
+ Any flash chip larger than the size specified in this option will
+ not use 4K sectors.
+
source "drivers/mtd/spi-nor/controllers/Kconfig"
endif # MTD_SPI_NOR
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2640,6 +2640,21 @@ static void spi_nor_info_init_params(str
*/
erase_mask = 0;
i = 0;
+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+ if ((info->flags & SECT_4K_PMC) && (params->size <=
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
+ erase_mask |= BIT(i);
+ spi_nor_set_erase_type(&map->erase_type[i], 4096u,
+ SPINOR_OP_BE_4K_PMC);
+ i++;
+ } else if ((info->flags & SECT_4K) && (params->size <=
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
+ erase_mask |= BIT(i);
+ spi_nor_set_erase_type(&map->erase_type[i], 4096u,
+ SPINOR_OP_BE_4K);
+ i++;
+ }
+#else
if (info->flags & SECT_4K_PMC) {
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
@@ -2651,6 +2666,7 @@ static void spi_nor_info_init_params(str
SPINOR_OP_BE_4K);
i++;
}
+#endif
erase_mask |= BIT(i);
spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
SPINOR_OP_SE);

@ -511,7 +511,6 @@ CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_SST25L=y

@ -178,7 +178,6 @@ CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y

@ -116,7 +116,6 @@ CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SPLIT_JIMAGE_FW=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_TPLINK_FW=y

@ -106,7 +106,6 @@ CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SPLIT_JIMAGE_FW=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y

@ -104,7 +104,6 @@ CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_NEED_DMA_MAP_STATE=y