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mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-10-19 05:58:53 +02:00

realtek: remove hardcoded sys-led configurations

setup.c unconditionally sets the sys-led mode (blinking rate) to a
permanent high output. This may cause issues when a board expects this
pin to toggle periodically, e.g. when hooked up to an external watchdog.

If the sys-led peripheral is used to control an LED, the mux should be
configured to use the pin as GPIO0, allowing for better control as a
GPIO LED.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
This commit is contained in:
Sander Vanheule 2021-11-26 22:16:47 +01:00
parent b03109c094
commit eae5e55a79

@ -28,31 +28,6 @@
extern struct rtl83xx_soc_info soc_info;
static void __init rtl838x_setup(void)
{
/* Setup System LED. Bit 15 then allows to toggle it */
sw_w32_mask(0, 3 << 16, RTL838X_LED_GLB_CTRL);
}
static void __init rtl839x_setup(void)
{
/* Setup System LED. Bit 14 of RTL839X_LED_GLB_CTRL then allows to toggle it */
sw_w32_mask(0, 3 << 15, RTL839X_LED_GLB_CTRL);
}
static void __init rtl930x_setup(void)
{
if (soc_info.id == 0x9302)
sw_w32_mask(0, 3 << 13, RTL9302_LED_GLB_CTRL);
else
sw_w32_mask(0, 3 << 13, RTL930X_LED_GLB_CTRL);
}
static void __init rtl931x_setup(void)
{
sw_w32_mask(0, 3 << 12, RTL931X_LED_GLB_CTRL);
}
void __init plat_mem_setup(void)
{
void *dtb;
@ -71,21 +46,6 @@ void __init plat_mem_setup(void)
* parsed resulting in our memory appearing
*/
__dt_setup_arch(dtb);
switch (soc_info.family) {
case RTL8380_FAMILY_ID:
rtl838x_setup();
break;
case RTL8390_FAMILY_ID:
rtl839x_setup();
break;
case RTL9300_FAMILY_ID:
rtl930x_setup();
break;
case RTL9310_FAMILY_ID:
rtl931x_setup();
break;
}
}
void __init plat_time_init(void)