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Code Issues

mvebu: eDPU: add support for version with external switch

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New revision of eDPU uses an Marvell MV88E6361 switch to connect the SFP
cage and G.hn IC instead of connecting them directly to the ethernet
controllers.

The same image can be used on both versions as U-Boot will enable the
switch node and disable the unused ethernet controller.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This commit is contained in:
Robert Marko 2023-08-03 13:16:05 +02:00
parent 2bb418299d
commit d6ac365e42
No known key found for this signature in database
GPG Key ID: 66D805C09F36AFA5
2 changed files with 56 additions and 2 deletions
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11
target/linux/mvebu/cortexa53/base-files/etc/board.d/02_network
View File

@ -21,10 +21,17 @@ globalscale,espressobin-ultra)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "wan" ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "wan"
;; ;;
marvell,armada-3720-db|\ marvell,armada-3720-db|\
methode,udpu|\ methode,udpu)
methode,edpu)
ucidef_set_interfaces_lan_wan "eth1" "eth0" ucidef_set_interfaces_lan_wan "eth1" "eth0"
;; ;;
methode,edpu)
# eDPU+ has a 88E6361 switch, so we check for it
if ip link | grep -q uplink; then
ucidef_set_interfaces_lan_wan "downlink" "uplink"
else
ucidef_set_interfaces_lan_wan "eth1" "eth0"
fi
;;
*) *)
ucidef_set_interface_lan "eth0" ucidef_set_interface_lan "eth0"
;; ;;

47
target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
View File

@ -17,3 +17,50 @@
&eth0 { &eth0 {
phy-mode = "1000base-x"; phy-mode = "1000base-x";
}; };
/*
* External MV88E6361 switch is only available on v2 of the board.
* U-Boot will enable the MDIO bus and switch nodes.
*/
&mdio {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&smi_pins>;
/* Actual device is MV88E6361 */
switch: switch@0 {
compatible = "marvell,mv88e6190";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "2500base-x";
managed = "in-band-status";
ethernet = <&eth0>;
};
port@9 {
reg = <9>;
label = "downlink";
phy-mode = "2500base-x";
managed = "in-band-status";
};
port@a {
reg = <10>;
label = "uplink";
phy-mode = "2500base-x";
managed = "in-band-status";
sfp = <&sfp_eth1>;
};
};
};
};