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mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-10-18 13:29:16 +02:00

rockchip: add support for Radxa ROCK Pi S

Radxa ROCK Pi S is a small in size, full in features SBC[1] using the
Rockchip RK3308B SoC.

Hardware
--------
- Rockchip RK3308B SoC
- Quad A35 CPU
- 256/512MB DDR3 RAM
- Optional 4/8GB eMMC
- Micro SD Card slot
- Optional WiFi 4 and BT 4 (not supported yet)
- 1x 100M Ethernet with PoE support (additional PoE HAT required)
- 1x USB 2.0 Type-A port (Host)
- 1x USB 2.0 Type-C port (OTG)
- 2x 26 Pin GPIO header

[1] https://radxa.com/products/rockpi/pis

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/15933
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
FUKAUMI Naoki 2024-07-22 08:01:56 +09:00 committed by Hauke Mehrtens
parent 2d31004133
commit bbcd5111cb
10 changed files with 466 additions and 0 deletions

@ -25,6 +25,19 @@ define Trusted-Firmware-A/Default
BUILD_TARGET:=rockchip
endef
define Trusted-Firmware-A/rk3308
BUILD_SUBTARGET:=armv8
ATF:=rk33/rk3308_bl31_v2.26.elf
TPL:=rk33/rk3308_ddr_589MHz_uart2_m1_v2.07.bin
endef
define Trusted-Firmware-A/rk3308-rock-pi-s
NAME:=Radxa ROCK Pi S
BUILD_SUBTARGET:=armv8
ATF:=rk33/rk3308_bl31_v2.26.elf
TPL:=rk33/rk3308_ddr_589MHz_uart0_m0_v2.07.bin
endef
define Trusted-Firmware-A/rk3566
BUILD_SUBTARGET:=armv8
ATF:=rk35/rk3568_bl31_v1.44.elf
@ -45,10 +58,28 @@ define Trusted-Firmware-A/rk3568-e25
endef
TFA_TARGETS:= \
rk3308 \
rk3308-rock-pi-s \
rk3566 \
rk3568 \
rk3568-e25
ifeq ($(BUILD_VARIANT),rk3308-rock-pi-s)
TPL_FILE:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
define Download/rk3308-tpl-rock-pi-s
FILE:=$(TPL_FILE)
URL:=https://github.com/radxa/rkbin/raw/5696fab20dcac57c1458f72dc7604ba60e553adf/bin/rk33/
HASH:=8a1a42df23cccb86a2dabc14a5c0e9227d64a51b9b83e9968ef5af3b30787f7d
endef
define Build/Prepare
$(eval $(call Download,rk3308-tpl-rock-pi-s))
$(call Build/Prepare/Default)
$(CP) $(DL_DIR)/$(TPL_FILE) $(PKG_BUILD_DIR)/bin/rk33/
endef
endif
ifeq ($(BUILD_VARIANT),rk3568-e25)
TPL_FILE:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
define Download/rk3568-tpl-e25

@ -24,6 +24,24 @@ define U-Boot/Default
endef
# RK3308 boards
define U-Boot/rk3308/Default
BUILD_SUBTARGET:=armv8
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308
ATF:=rk3308_bl31_v2.26.elf
TPL:=rk3308_ddr_589MHz_uart2_m1_v2.07.bin
endef
define U-Boot/rock-pi-s-rk3308
$(U-Boot/rk3308/Default)
DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308-rock-pi-s
TPL:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
NAME:=ROCK Pi S
BUILD_DEVICES:= \
radxa_rock-pi-s
endef
# RK3328 boards
define U-Boot/rk3328/Default
@ -186,6 +204,7 @@ UBOOT_TARGETS := \
nanopi-r4s-rk3399 \
rock-pi-4-rk3399 \
rockpro64-rk3399 \
rock-pi-s-rk3308 \
nanopi-r2c-rk3328 \
nanopi-r2c-plus-rk3328 \
nanopi-r2s-rk3328 \

@ -131,6 +131,17 @@ define Device/radxa_rock-pi-e
endef
TARGET_DEVICES += radxa_rock-pi-e
define Device/radxa_rock-pi-s
DEVICE_VENDOR := Radxa
DEVICE_MODEL := ROCK Pi S
SOC := rk3308
DEVICE_DTS := rockchip/rk3308-rock-pi-s
BOOT_SCRIPT := rock-pi-s
UBOOT_DEVICE_NAME := rock-pi-s-rk3308
DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
endef
TARGET_DEVICES += radxa_rock-pi-s
define Device/sinovoip_bpi-r2-pro
DEVICE_VENDOR := Sinovoip
DEVICE_MODEL := Bananapi-R2 Pro

@ -0,0 +1,7 @@
part uuid ${devtype} ${devnum}:2 uuid
setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32,0xff0a0000 root=PARTUUID=${uuid} rw rootwait";
load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
bootm ${kernel_addr_r}

@ -0,0 +1,84 @@
From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001
From: Trevor Woerner <twoerner@gmail.com>
Date: Mon, 20 Nov 2023 11:22:32 -0500
Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s
Add names to the pins of the general-purpose expansion header as given in the
Radxa GPIO page[1] following the conventions in the kernel documentation[2] to
make it easier for users to correlate the pins with functions when using
utilities such as gpioinfo.
[1] https://wiki.radxa.com/RockpiS/hardware/gpio
[2] Documentation/devicetree/bindings/gpio/gpio.txt
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -258,3 +258,61 @@
&wdt {
status = "okay";
};
+
+&gpio0 {
+ gpio-line-names =
+ /* GPIO0_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO0_B0 - B7 */
+ "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
+ "", "", "header1-pin11 [GPIO0_B7]",
+ /* GPIO0_C0 - C7 */
+ "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
+ "", "", "",
+ /* GPIO0_D0 - D8 */
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /* GPIO1_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_B0 - B7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_C0 - C7 */
+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
+ "header1-pin19 [GPIO1_C7]",
+ /* GPIO1_D0 - D8 */
+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
+ "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ /* GPIO2_A0 - A7 */
+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
+ /* GPIO2_B0 - B7 */
+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
+ /* GPIO2_C0 - C7 */
+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
+ /* GPIO2_D0 - D8 */
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ /* GPIO3_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO3_B0 - B7 */
+ "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
+ "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
+ /* GPIO3_C0 - C7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO3_D0 - D8 */
+ "", "", "", "", "", "", "", "";
+};

@ -0,0 +1,152 @@
From 085021cc825ed90a6ddc4406f608fb8a85745f81 Mon Sep 17 00:00:00 2001
From: Trevor Woerner <twoerner@gmail.com>
Date: Tue, 19 Dec 2023 12:38:13 -0500
Subject: [PATCH] arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names
cleanup
Perform the following cleanups on a previous patch:
- indent lines after "gpio-line-names"
- fix D0-D8 -> D0-D7
- sort phandle references
Fixes: c45de75d7a9a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s")
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 120 +++++++++---------
1 file changed, 62 insertions(+), 58 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -151,6 +151,68 @@
status = "okay";
};
+&gpio0 {
+ gpio-line-names =
+ /* GPIO0_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO0_B0 - B7 */
+ "", "", "", "header1-pin3 [GPIO0_B3]",
+ "header1-pin5 [GPIO0_B4]", "", "",
+ "header1-pin11 [GPIO0_B7]",
+ /* GPIO0_C0 - C7 */
+ "header1-pin13 [GPIO0_C0]",
+ "header1-pin15 [GPIO0_C1]", "", "", "",
+ "", "", "",
+ /* GPIO0_D0 - D7 */
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /* GPIO1_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_B0 - B7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_C0 - C7 */
+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
+ "header1-pin19 [GPIO1_C7]",
+ /* GPIO1_D0 - D7 */
+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]",
+ "", "", "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ /* GPIO2_A0 - A7 */
+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]",
+ "", "",
+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
+ /* GPIO2_B0 - B7 */
+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
+ /* GPIO2_C0 - C7 */
+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
+ /* GPIO2_D0 - D7 */
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ /* GPIO3_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO3_B0 - B7 */
+ "", "", "header2-pin42 [GPIO3_B2]",
+ "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]",
+ "header2-pin39 [GPIO3_B5]", "", "",
+ /* GPIO3_C0 - C7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO3_D0 - D7 */
+ "", "", "", "", "", "", "", "";
+};
+
&i2c1 {
status = "okay";
};
@@ -258,61 +320,3 @@
&wdt {
status = "okay";
};
-
-&gpio0 {
- gpio-line-names =
- /* GPIO0_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO0_B0 - B7 */
- "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
- "", "", "header1-pin11 [GPIO0_B7]",
- /* GPIO0_C0 - C7 */
- "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
- "", "", "",
- /* GPIO0_D0 - D8 */
- "", "", "", "", "", "", "", "";
-};
-
-&gpio1 {
- gpio-line-names =
- /* GPIO1_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_B0 - B7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_C0 - C7 */
- "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
- "header1-pin19 [GPIO1_C7]",
- /* GPIO1_D0 - D8 */
- "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
- "", "", "";
-};
-
-&gpio2 {
- gpio-line-names =
- /* GPIO2_A0 - A7 */
- "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
- "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
- "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
- /* GPIO2_B0 - B7 */
- "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
- "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
- "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
- "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
- /* GPIO2_C0 - C7 */
- "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
- /* GPIO2_D0 - D8 */
- "", "", "", "", "", "", "", "";
-};
-
-&gpio3 {
- gpio-line-names =
- /* GPIO3_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO3_B0 - B7 */
- "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
- "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
- /* GPIO3_C0 - C7 */
- "", "", "", "", "", "", "", "",
- /* GPIO3_D0 - D8 */
- "", "", "", "", "", "", "", "";
-};

@ -0,0 +1,32 @@
From fc0daeccc384233eadfa9d5ddbd00159653c6bdc Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 21 May 2024 21:10:07 +0000
Subject: [PATCH] arm64: dts: rockchip: Add sdmmc related properties on
rk3308-rock-pi-s
Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC
to uSD board. Use disable-wp to signal that no physical write-protect
line is present. Also add vcc_io used for card and IO line power as
vmmc-supply.
Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240521211029.1236094-5-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -272,7 +272,10 @@
};
&sdmmc {
+ cap-mmc-highspeed;
cap-sd-highspeed;
+ disable-wp;
+ vmmc-supply = <&vcc_io>;
status = "okay";
};

@ -0,0 +1,31 @@
From 7affb86ef62581e3475ce3e0a7640da1f2ee29f8 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 21 May 2024 21:10:08 +0000
Subject: [PATCH] arm64: dts: rockchip: Add pinctrl for UART0 to
rk3308-rock-pi-s
UAR0 CTS/RTS is not wired to any pin and is not used for the default
serial console use of UART0 on ROCK Pi S.
Override the SoC defined pinctrl props to limit configuration of the
two xfer pins wired to one of the GPIO pin headers.
Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240521211029.1236094-6-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -294,6 +294,8 @@
};
&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>;
status = "okay";
};

@ -0,0 +1,61 @@
From 4b64ed510ed946a4e4ca6d51d6512bf5361f6a04 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 21 May 2024 21:10:10 +0000
Subject: [PATCH] arm64: dts: rockchip: Add mdio and ethernet-phy nodes to
rk3308-rock-pi-s
Be explicit about the Ethernet port and define mdio and ethernet-phy
nodes in the device tree for ROCK Pi S.
Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240521211029.1236094-8-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 26 ++++++++++++++++---
1 file changed, 23 insertions(+), 3 deletions(-)
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -144,11 +144,25 @@
&gmac {
clock_in_out = "output";
+ phy-handle = <&rtl8201f>;
phy-supply = <&vcc_io>;
- snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 50000 50000>;
status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8201f: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mac_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&gpio0 {
@@ -221,6 +235,12 @@
pinctrl-names = "default";
pinctrl-0 = <&rtc_32k>;
+ gmac {
+ mac_rst: mac-rst {
+ rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
green_led: green-led {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;

@ -0,0 +1,38 @@
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -17,6 +17,10 @@
ethernet0 = &gmac;
mmc0 = &emmc;
mmc1 = &sdmmc;
+ led-boot = &blue_led;
+ led-failsafe = &blue_led;
+ led-running = &blue_led;
+ led-upgrade = &blue_led;
};
chosen {
@@ -28,22 +32,19 @@
pinctrl-names = "default";
pinctrl-0 = <&green_led>, <&heartbeat_led>;
- green-led {
+ led-0 {
color = <LED_COLOR_ID_GREEN>;
default-state = "on";
function = LED_FUNCTION_POWER;
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- label = "rockpis:green:power";
linux,default-trigger = "default-on";
};
- blue-led {
+ blue_led: led-1 {
color = <LED_COLOR_ID_BLUE>;
default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- label = "rockpis:blue:user";
- linux,default-trigger = "heartbeat";
};
};