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uboot-mediatek: update to 2021.10

U-Boot 2021.10 has been released.
Rebase mediatek patches on top of new release and remove some patches
which have been merged upstream.

Tested on Bananapi BPi-R2 (mt7623), Bananapi BPi-R64 (mt7622) and
Linksys E8450 (mt7622).

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2021-08-19 03:57:00 +01:00
parent ed7769aa40
commit b6da10f2d1
No known key found for this signature in database
GPG Key ID: 5A8F39C31C3217CA
32 changed files with 77 additions and 610 deletions

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@ -1,8 +1,8 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2021.04
PKG_HASH:=0d438b1bb5cceb57a18ea2de4a0d51f7be5b05b98717df05938636e0aadfe11a
PKG_VERSION:=2021.10
PKG_HASH:=cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4
PKG_BUILD_DEPENDS:=arm-trusted-firmware-tools/host
include $(INCLUDE_DIR)/u-boot.mk
@ -120,6 +120,11 @@ define Build/fip-image
$(PKG_BUILD_DIR)/u-boot.fip
endef
define Build/Configure
$(call Build/Configure/U-Boot)
sed -i 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config
endef
define Build/Compile
$(call Build/Compile/U-Boot)
ifeq ($(UBOOT_IMAGE),u-boot.fip))

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@ -1,7 +1,7 @@
From 5efb7855a9d33ac897d6e2a7117e4e3d35d433a5 Mon Sep 17 00:00:00 2001
From 34ed9f6d3018d32c7c015e57c9985d3c4c07b706 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 11 Mar 2021 10:28:53 +0000
Subject: [PATCH 01/21] Revert "clk: Add debugging for return values"
Subject: [PATCH 01/12] Revert "clk: Add debugging for return values"
This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5.
---
@ -10,7 +10,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5.
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -84,7 +84,7 @@ static int clk_get_by_index_tail(int ret
@@ -87,7 +87,7 @@ static int clk_get_by_index_tail(int ret
if (ret) {
debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
__func__, ret);
@ -19,7 +19,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5.
}
clk->dev = dev_clk;
@@ -97,15 +97,14 @@ static int clk_get_by_index_tail(int ret
@@ -100,15 +100,14 @@ static int clk_get_by_index_tail(int ret
ret = clk_of_xlate_default(clk, args);
if (ret) {
debug("of_xlate() failed: %d\n", ret);
@ -37,7 +37,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5.
}
static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
@@ -124,7 +123,7 @@ static int clk_get_by_indexed_prop(struc
@@ -127,7 +126,7 @@ static int clk_get_by_indexed_prop(struc
if (ret) {
debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
__func__, ret);
@ -46,7 +46,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5.
}
@@ -472,7 +471,6 @@ int clk_free(struct clk *clk)
@@ -502,7 +501,6 @@ int clk_free(struct clk *clk)
ulong clk_get_rate(struct clk *clk)
{
const struct clk_ops *ops;
@ -54,7 +54,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5.
debug("%s(clk=%p)\n", __func__, clk);
if (!clk_valid(clk))
@@ -482,11 +480,7 @@ ulong clk_get_rate(struct clk *clk)
@@ -512,11 +510,7 @@ ulong clk_get_rate(struct clk *clk)
if (!ops->get_rate)
return -ENOSYS;

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@ -1,25 +0,0 @@
From 6f18e581a7e98db3675b4c111701263647b20781 Mon Sep 17 00:00:00 2001
From: Sam Shih <sam.shih@mediatek.com>
Date: Thu, 17 Dec 2020 19:29:56 +0800
Subject: [PATCH 03/21] pinctrl: mediatek: fix wrong assignment in
mtk_get_pin_name
This is a bug fix for mtk pinctrl common part. Appearently pins should be
used instead of grps in mtk_get_pin_name().
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -219,7 +219,7 @@ static const char *mtk_get_pin_name(stru
{
struct mtk_pinctrl_priv *priv = dev_get_priv(dev);
- if (!priv->soc->grps[selector].name)
+ if (!priv->soc->pins[selector].name)
return mtk_pinctrl_dummy_name;
return priv->soc->pins[selector].name;

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@ -1,43 +0,0 @@
From ca73da39ff0c9f599f75d7ccac0196030aa946b9 Mon Sep 17 00:00:00 2001
From: Sam Shih <sam.shih@mediatek.com>
Date: Thu, 17 Dec 2020 19:32:48 +0800
Subject: [PATCH 04/21] pinctrl: mediatek: add get_pin_muxing ops for mediatek
pinctrl
This patch add get_pin_muxing support for mediatek pinctrl drivers
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -232,6 +232,19 @@ static int mtk_get_pins_count(struct ude
return priv->soc->npins;
}
+static int mtk_get_pin_muxing(struct udevice *dev,
+ unsigned int selector,
+ char *buf, int size)
+{
+ int val, err;
+ err = mtk_hw_get_value(dev, selector, PINCTRL_PIN_REG_MODE, &val);
+ if (err)
+ return err;
+
+ snprintf(buf, size, "Aux Func.%d", val);
+ return 0;
+}
+
static const char *mtk_get_group_name(struct udevice *dev,
unsigned int selector)
{
@@ -512,6 +525,7 @@ static int mtk_pinconf_group_set(struct
const struct pinctrl_ops mtk_pinctrl_ops = {
.get_pins_count = mtk_get_pins_count,
.get_pin_name = mtk_get_pin_name,
+ .get_pin_muxing = mtk_get_pin_muxing,
.get_groups_count = mtk_get_groups_count,
.get_group_name = mtk_get_group_name,
.get_functions_count = mtk_get_functions_count,

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@ -1,58 +0,0 @@
From d3fbbef13853a695cdea75a980a3d6bd150a68c1 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Mon, 11 Jan 2021 10:17:15 +0800
Subject: [PATCH 05/21] pinctrl: mediatek: do not probe gpio driver if not
enabled
The mtk pinctrl driver is a combination driver with support for both
pinctrl and gpio. When this driver is used in SPL, gpio support may not be
enabled, and this will result in a compilation error.
To fix this, macros are added to make sure gpio related code will only be
compiled when gpio support is enabled.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -540,6 +540,8 @@ const struct pinctrl_ops mtk_pinctrl_ops
.set_state = pinctrl_generic_set_state,
};
+#if CONFIG_IS_ENABLED(DM_GPIO) || \
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
static int mtk_gpio_get(struct udevice *dev, unsigned int off)
{
int val, err;
@@ -647,12 +649,13 @@ static int mtk_gpiochip_register(struct
return 0;
}
+#endif
int mtk_pinctrl_common_probe(struct udevice *dev,
struct mtk_pinctrl_soc *soc)
{
struct mtk_pinctrl_priv *priv = dev_get_priv(dev);
- int ret;
+ int ret = 0;
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
@@ -660,9 +663,10 @@ int mtk_pinctrl_common_probe(struct udev
priv->soc = soc;
+#if CONFIG_IS_ENABLED(DM_GPIO) || \
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
ret = mtk_gpiochip_register(dev);
- if (ret)
- return ret;
+#endif
- return 0;
+ return ret;
}

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@ -1,50 +0,0 @@
From 1c6d07abf7fc79bf3950dc9ac56e3b566c334d3d Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 13 Jan 2021 16:29:23 +0800
Subject: [PATCH 06/21] pinctrl: mt7629: add jtag function and pin group
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin
group to the pinctrl driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/pinctrl/mediatek/pinctrl-mt7629.c | 7 +++++++
1 file changed, 7 insertions(+)
--- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c
@@ -201,6 +201,10 @@ static int mt7629_wf2g_led_funcs[] = { 1
static int mt7629_wf5g_led_pins[] = { 18, };
static int mt7629_wf5g_led_funcs[] = { 1, };
+/* LED for EPHY used as JTAG */
+static int mt7629_ephy_leds_jtag_pins[] = { 12, 13, 14, 15, 16, };
+static int mt7629_ephy_leds_jtag_funcs[] = { 7, 7, 7, 7, 7, };
+
/* Watchdog */
static int mt7629_watchdog_pins[] = { 11, };
static int mt7629_watchdog_funcs[] = { 1, };
@@ -297,6 +301,7 @@ static const struct mtk_group_desc mt762
PINCTRL_PIN_GROUP("ephy_led2", mt7629_ephy_led2),
PINCTRL_PIN_GROUP("ephy_led3", mt7629_ephy_led3),
PINCTRL_PIN_GROUP("ephy_led4", mt7629_ephy_led4),
+ PINCTRL_PIN_GROUP("ephy_leds_jtag", mt7629_ephy_leds_jtag),
PINCTRL_PIN_GROUP("wf2g_led", mt7629_wf2g_led),
PINCTRL_PIN_GROUP("wf5g_led", mt7629_wf5g_led),
PINCTRL_PIN_GROUP("watchdog", mt7629_watchdog),
@@ -364,6 +369,7 @@ static const char *const mt7629_uart_gro
static const char *const mt7629_wdt_groups[] = { "watchdog", };
static const char *const mt7629_wifi_groups[] = { "wf0_5g", "wf0_2g", };
static const char *const mt7629_flash_groups[] = { "snfi", "spi_nor" };
+static const char *const mt7629_jtag_groups[] = { "ephy_leds_jtag" };
static const struct mtk_function_desc mt7629_functions[] = {
{"eth", mt7629_ethernet_groups, ARRAY_SIZE(mt7629_ethernet_groups)},
@@ -376,6 +382,7 @@ static const struct mtk_function_desc mt
{"watchdog", mt7629_wdt_groups, ARRAY_SIZE(mt7629_wdt_groups)},
{"wifi", mt7629_wifi_groups, ARRAY_SIZE(mt7629_wifi_groups)},
{"flash", mt7629_flash_groups, ARRAY_SIZE(mt7629_flash_groups)},
+ {"jtag", mt7629_jtag_groups, ARRAY_SIZE(mt7629_jtag_groups)},
};
static struct mtk_pinctrl_soc mt7629_data = {

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@ -1,25 +0,0 @@
From c47a5b927787a463eff8f67339d91e60fe0381c4 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 2 Mar 2021 15:02:50 +0800
Subject: [PATCH 07/21] configs: mt7622: use ARMv8 Generic Timer instead of
mtk_timer
It's better to use the generic timer which is correctly initialized by
the ATF. The generic timer has higher resolution than the mtk_timer.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
configs/mt7622_rfb_defconfig | 2 --
1 file changed, 2 deletions(-)
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -51,8 +51,6 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MTK_SNOR=y
CONFIG_SYSRESET_WATCHDOG=y
-CONFIG_TIMER=y
-CONFIG_MTK_TIMER=y
CONFIG_WDT_MTK=y
CONFIG_LZO=y
CONFIG_HEXDUMP=y

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@ -1,50 +0,0 @@
From 4bee3f9e285007ccf77ca9916fff3d93fc4d8a80 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 2 Mar 2021 15:43:27 +0800
Subject: [PATCH 08/21] dts: mt7629: enable JTAG pins by default
The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely
used. These LED pins on reference boards are used as JTAG socket. So it's
a good idea to change the default state to JTAG, and this will make it
convenience for debugging.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/mt7629-rfb.dts | 10 ++++++++++
arch/arm/dts/mt7629.dtsi | 6 ++++++
2 files changed, 16 insertions(+)
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -36,6 +36,16 @@
};
&pinctrl {
+ state_default: pinmux_conf {
+ u-boot,dm-pre-reloc;
+
+ mux {
+ function = "jtag";
+ groups = "ephy_leds_jtag";
+ u-boot,dm-pre-reloc;
+ };
+ };
+
snfi_pins: snfi-pins {
mux {
function = "flash";
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -152,6 +152,12 @@
compatible = "mediatek,mt7629-pinctrl";
reg = <0x10217000 0x8000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux_conf {
+ };
+
gpio: gpio-controller {
gpio-controller;
#gpio-cells = <2>;

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@ -1,7 +1,7 @@
From f3f320af7078a8c5647d870a31c1d3695dacd7cf Mon Sep 17 00:00:00 2001
From 938ba7ed996a86c9cc7af08b69df57b8b4c09510 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 2 Mar 2021 15:47:45 +0800
Subject: [PATCH 09/21] board: mediatek: add more network configurations
Subject: [PATCH 02/12] board: mediatek: add more network configurations
Make the network configurations uniform for mediatek boards

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@ -1,7 +1,7 @@
From ed880b7572e1135e3bd8382d4670a375f7d9c91b Mon Sep 17 00:00:00 2001
From 1d4fcea788e579934a1ad0a90cecd6e1761127d1 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 2 Mar 2021 15:56:17 +0800
Subject: [PATCH 10/21] mmc: mtk-sd: increase the minimum bus frequency
Subject: [PATCH 03/12] mmc: mtk-sd: increase the minimum bus frequency
With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
@ -12,27 +12,17 @@ issue without any side effects.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/mmc/mtk-sd.c | 5 +++++
1 file changed, 5 insertions(+)
drivers/mmc/mtk-sd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -232,6 +232,8 @@
@@ -232,7 +232,7 @@
#define SCLK_CYCLES_SHIFT 20
-#define MIN_BUS_CLK 200000
+#define MIN_BUS_CLK 260000
+
#define CMD_INTS_MASK \
(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
@@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice
else
cfg->f_min = host->src_clk_freq / (4 * 4095);
+ if (cfg->f_min < MIN_BUS_CLK)
+ cfg->f_min = MIN_BUS_CLK;
+
if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
cfg->f_max = host->src_clk_freq;

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@ -1,141 +0,0 @@
From d8bde59186dafdea5bbe8d29d3a6ae7cac98e9d0 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Mon, 25 Jan 2021 11:19:08 +0800
Subject: [PATCH 11/21] serial: serial-mtk: rewrite the setbrg function
Currently the setbrg logic of serial-mtk is messy, and should be rewritten.
Also an option is added to make it possible to use highspeed=3 mode for all
bauds.
The new logic is:
1. If baud clock > 12MHz
a) If baud <= 115200, highspeed=0 mode will be used (ns16550 compatible)
b) If baud <= 576000, highspeed=2 mode will be used
c) any baud > 576000, highspeed=3 mode will be used
2. If baud clock <= 12MHz
Always uses highspeed=3 mode
a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST
b) any baud > 115200, the same as 1. c)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/serial/serial_mtk.c | 74 +++++++++++++++++--------------------
1 file changed, 33 insertions(+), 41 deletions(-)
--- a/drivers/serial/serial_mtk.c
+++ b/drivers/serial/serial_mtk.c
@@ -73,74 +73,64 @@ struct mtk_serial_regs {
struct mtk_serial_priv {
struct mtk_serial_regs __iomem *regs;
u32 clock;
+ bool force_highspeed;
};
static void _mtk_serial_setbrg(struct mtk_serial_priv *priv, int baud)
{
- bool support_clk12m_baud115200;
- u32 quot, samplecount, realbaud;
+ u32 quot, realbaud, samplecount = 1;
- if ((baud <= 115200) && (priv->clock == 12000000))
- support_clk12m_baud115200 = true;
- else
- support_clk12m_baud115200 = false;
+ /* Special case for low baud clock */
+ if ((baud <= 115200) && (priv->clock == 12000000)) {
+ writel(3, &priv->regs->highspeed);
+
+ quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud);
+ if (quot == 0)
+ quot = 1;
+
+ samplecount = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
+
+ realbaud = priv->clock / samplecount / quot;
+ if ((realbaud > BAUD_ALLOW_MAX(baud)) ||
+ (realbaud < BAUD_ALLOW_MIX(baud))) {
+ pr_info("baud %d can't be handled\n", baud);
+ }
+
+ goto set_baud;
+ }
+
+ if (priv->force_highspeed)
+ goto use_hs3;
if (baud <= 115200) {
writel(0, &priv->regs->highspeed);
quot = DIV_ROUND_CLOSEST(priv->clock, 16 * baud);
-
- if (support_clk12m_baud115200) {
- writel(3, &priv->regs->highspeed);
- quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud);
- if (quot == 0)
- quot = 1;
-
- samplecount = DIV_ROUND_CLOSEST(priv->clock,
- quot * baud);
- if (samplecount != 0) {
- realbaud = priv->clock / samplecount / quot;
- if ((realbaud > BAUD_ALLOW_MAX(baud)) ||
- (realbaud < BAUD_ALLOW_MIX(baud))) {
- pr_info("baud %d can't be handled\n",
- baud);
- }
- } else {
- pr_info("samplecount is 0\n");
- }
- }
} else if (baud <= 576000) {
writel(2, &priv->regs->highspeed);
/* Set to next lower baudrate supported */
if ((baud == 500000) || (baud == 576000))
baud = 460800;
+
quot = DIV_ROUND_UP(priv->clock, 4 * baud);
} else {
+use_hs3:
writel(3, &priv->regs->highspeed);
+
quot = DIV_ROUND_UP(priv->clock, 256 * baud);
+ samplecount = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
}
+set_baud:
/* set divisor */
writel(UART_LCR_WLS_8 | UART_LCR_DLAB, &priv->regs->lcr);
writel(quot & 0xff, &priv->regs->dll);
writel((quot >> 8) & 0xff, &priv->regs->dlm);
writel(UART_LCR_WLS_8, &priv->regs->lcr);
- if (baud > 460800) {
- u32 tmp;
-
- tmp = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
- writel(tmp - 1, &priv->regs->sample_count);
- writel((tmp - 2) >> 1, &priv->regs->sample_point);
- } else {
- writel(0, &priv->regs->sample_count);
- writel(0xff, &priv->regs->sample_point);
- }
-
- if (support_clk12m_baud115200) {
- writel(samplecount - 1, &priv->regs->sample_count);
- writel((samplecount - 2) >> 1, &priv->regs->sample_point);
- }
+ /* set highspeed mode sample count & point */
+ writel(samplecount - 1, &priv->regs->sample_count);
+ writel((samplecount - 2) >> 1, &priv->regs->sample_point);
}
static int _mtk_serial_putc(struct mtk_serial_priv *priv, const char ch)
@@ -248,6 +238,8 @@ static int mtk_serial_of_to_plat(struct
return -EINVAL;
}
+ priv->force_highspeed = dev_read_bool(dev, "mediatek,force-highspeed");
+
return 0;
}

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@ -1,94 +0,0 @@
From a80ef99cb308904b82662deb66c5ed7a6ff59928 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 11:13:36 +0800
Subject: [PATCH 12/21] board: mt7629: enable compression of u-boot to reduce
the size of final image
This patch makes use of the decompression mechanism implemented for mt7628
previously to reduce the total image size. Binman will be also removed.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
Makefile | 3 +++
arch/arm/dts/mt7629-rfb-u-boot.dtsi | 18 ------------------
arch/arm/mach-mediatek/Kconfig | 1 -
configs/mt7629_rfb_defconfig | 6 ++++++
4 files changed, 9 insertions(+), 19 deletions(-)
--- a/Makefile
+++ b/Makefile
@@ -1666,6 +1666,9 @@ u-boot-elf.lds: arch/u-boot-elf.lds prep
ifeq ($(CONFIG_SPL),y)
spl/u-boot-spl-mtk.bin: spl/u-boot-spl
+
+u-boot-mtk.bin: u-boot-with-spl.bin
+ $(call if_changed,copy)
else
MKIMAGEFLAGS_u-boot-mtk.bin = -T mtk_image \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
--- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi
+++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi
@@ -5,24 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <config.h>
-/ {
- binman {
- filename = "u-boot-mtk.bin";
- pad-byte = <0xff>;
-
-#ifdef CONFIG_SPL
- blob {
- filename = "spl/u-boot-spl-mtk.bin";
- size = <CONFIG_SPL_PAD_TO>;
- };
-
- u-boot-img {
- };
-#endif
- };
-};
-
&infracfg {
u-boot,dm-pre-reloc;
};
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -36,7 +36,6 @@ config TARGET_MT7629
bool "MediaTek MT7629 SoC"
select CPU_V7A
select SPL
- select BINMAN
help
The MediaTek MT7629 is a ARM-based SoC with a dual-core Cortex-A7
including DDR3, crypto engine, 3x3 11n/ac Wi-Fi, Gigabit Ethernet,
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -10,7 +10,11 @@ CONFIG_SPL_TEXT_BASE=0x201000
CONFIG_TARGET_MT7629=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x40800000
+CONFIG_SPL_PAYLOAD="u-boot-lzma.img"
+CONFIG_BUILD_TARGET="u-boot-mtk.bin"
CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
+CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
@@ -18,6 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="mt7629-rfb"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
@@ -87,4 +92,5 @@ CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_WDT_MTK=y
CONFIG_LZMA=y
+CONFIG_SPL_LZMA=y
# CONFIG_EFI_LOADER is not set

View File

@ -1,26 +0,0 @@
From acd49b1549ff52286aace5e841420aa750325f8b Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 10:53:14 +0800
Subject: [PATCH 13/21] configs: mt7622: enable debug uart for
mt7622_rfb_defconfig
Enable debug uart for mt7622_rfb_defconfig
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
configs/mt7622_rfb_defconfig | 3 +++
1 file changed, 3 insertions(+)
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -4,7 +4,10 @@ CONFIG_ARCH_MEDIATEK=y
CONFIG_SYS_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb"
+CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_DEFAULT_FDT_FILE="mt7622-rfb"
CONFIG_LOGLEVEL=7

View File

@ -1,7 +1,7 @@
From f22a055a9f589f1ec614045eba3cb0c5fd887feb Mon Sep 17 00:00:00 2001
From d6c5309185aae3d9ecf80eae8b248522d11a6136 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 2 Mar 2021 16:58:01 +0800
Subject: [PATCH 14/21] drivers: mtd: add support for MediaTek SPI-NAND flash
Subject: [PATCH 04/12] drivers: mtd: add support for MediaTek SPI-NAND flash
controller
Add mtd driver for MediaTek SPI-NAND flash controller
@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -108,6 +108,8 @@ config HBMC_AM654
@@ -109,6 +109,8 @@ config HBMC_AM654
This is the driver for HyperBus controller on TI's AM65x and
other SoCs
@ -49,7 +49,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
source "drivers/mtd/spi/Kconfig"
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -40,3 +40,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
@@ -39,3 +39,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR
obj-$(CONFIG_SPL_UBI) += ubispl/
endif

View File

@ -1,7 +1,7 @@
From 0c857d4c9cd9dc8e8ebba18cf9e9b10513ccb35d Mon Sep 17 00:00:00 2001
From b7fb0e0674db12bcf53df4b107a17c80758ee5d3 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 08:57:29 +0800
Subject: [PATCH 15/21] mtd: mtk-snand: add support for SPL
Subject: [PATCH 05/12] mtd: mtk-snand: add support for SPL
Add support to initialize SPI-NAND in SPL.
Add implementation for SPL NAND loader.

View File

@ -1,7 +1,7 @@
From eaa9bc597e0bf8bcd1486ea49c8c7c070a37a8aa Mon Sep 17 00:00:00 2001
From a26620ec83fa3077f0c261046e82091f7455736f Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 10:11:32 +0800
Subject: [PATCH 16/21] env: add support for generic MTD device
Subject: [PATCH 06/12] env: add support for generic MTD device
Add an env driver for generic MTD device.
@ -75,7 +75,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
config ENV_IS_IN_NAND
bool "Environment in a NAND device"
depends on !CHAIN_OF_TRUST
@@ -513,10 +534,16 @@ config ENV_ADDR_REDUND
@@ -534,10 +555,16 @@ config ENV_ADDR_REDUND
Offset from the start of the device (or partition) of the redundant
environment location.
@ -93,7 +93,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
default 0x3f8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC
default 0x140000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH
default 0x88000 if ARCH_SUNXI
@@ -560,6 +587,12 @@ config ENV_SECT_SIZE
@@ -582,6 +609,12 @@ config ENV_SECT_SIZE
help
Size of the sector containing the environment.
@ -399,7 +399,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
ENVL_ONENAND,
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -22,6 +22,7 @@ ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y
@@ -41,6 +41,7 @@ ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y
ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y
ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y
ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y

View File

@ -1,7 +1,7 @@
From 47b386259625061b376f538055a4f3fbd0ab7fef Mon Sep 17 00:00:00 2001
From 3757223c3354b9feeffcbe916eb18eb8873bd133 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 10:48:53 +0800
Subject: [PATCH 17/21] board: mt7629: add support for booting from SPI-NAND
Subject: [PATCH 07/12] board: mt7629: add support for booting from SPI-NAND
Add support for mt7629 to boot from SPI-NAND.
Add a new defconfig for mt7629+spi-nand configuration.

View File

@ -1,7 +1,7 @@
From ec0d1899b035700a657721761ff6370b940450ab Mon Sep 17 00:00:00 2001
From 6bcd65ed47844e747ff6db066b092632f1760256 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 10:51:43 +0800
Subject: [PATCH 18/21] board: mt7622: use new spi-nand driver
Subject: [PATCH 08/12] board: mt7622: use new spi-nand driver
Enable new spi-nand driver support for mt7622_rfb_defconfig
@ -63,8 +63,8 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
CONFIG_CMD_PCI=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_PING=y
@@ -28,6 +29,10 @@ CONFIG_CLK=y
CONFIG_DM_MMC=y
@@ -27,6 +28,10 @@ CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_MTK=y
+CONFIG_MTD=y

View File

@ -1,7 +1,7 @@
From 2f7aaf3c2c127bd53d5e8bfe39e808fdd6eb99be Mon Sep 17 00:00:00 2001
From 632f09f140610cf45da1dba25c66e9ca79a70a15 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 12:12:39 +0800
Subject: [PATCH 19/21] configs: mt7629: remove unused options and add dm
Subject: [PATCH 09/12] configs: mt7629: remove unused options and add dm
command
Remove unused bootm options
@ -14,7 +14,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -28,9 +28,14 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
@@ -28,9 +28,14 @@ CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTMENU=y

View File

@ -1,7 +1,7 @@
From e5a71a0eebadfb3d75d8619a8b317eec58b2bca2 Mon Sep 17 00:00:00 2001
From 93d7086edb0db4b05149dfea21a2a82d8f160944 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Sat, 6 Mar 2021 16:29:33 +0800
Subject: [PATCH 20/21] configs: mt7622: enable environment for mt7622_rfb
Subject: [PATCH 10/12] configs: mt7622: enable environment for mt7622_rfb
Enable environment vairables for mt7622_rfb
@ -12,15 +12,15 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -4,6 +4,8 @@ CONFIG_ARCH_MEDIATEK=y
CONFIG_SYS_TEXT_BASE=0x41e00000
@@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x41e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb"
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0x280000
CONFIG_DEBUG_UART_BASE=0x11002000
CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb"
CONFIG_DEBUG_UART=y
@@ -21,6 +23,9 @@ CONFIG_CMD_SF_TEST=y
CONFIG_CMD_PING=y
CONFIG_CMD_SMC=y

View File

@ -1,26 +0,0 @@
From c7d1b1890880ee64786b92a1b95ba9ecb4694997 Mon Sep 17 00:00:00 2001
From: Christian Melki <christian.melki@t2data.com>
Date: Mon, 7 Jun 2021 11:21:15 +0200
Subject: [PATCH] disk/part_dos.c: Fix a variable typo in
write_mbr_partitions()
This function is passed *dev not *dev_desc, so pass the right name to
part_init().
Fixes: f14c5ee5ab8b ("disk: part_dos: update partition table entries after write")
Signed-off-by: Christian Melki <christian.melki@t2data.com>
---
disk/part_dos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -424,7 +424,7 @@ int write_mbr_partitions(struct blk_desc
}
/* Update the partition table entries*/
- part_init(dev_desc);
+ part_init(dev);
return 0;
}

View File

@ -1,7 +1,7 @@
From b137ca16b54c67d76714ea5a0138741959b0dc29 Mon Sep 17 00:00:00 2001
From 12de602dc824bcb821287500fba831225cff5392 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Mon, 13 Jul 2020 23:37:37 +0200
Subject: [PATCH] scripts: remove dependency on swig
Subject: [PATCH 11/12] scripts: remove dependency on swig
Don't build the libfdt tool, as it has a dependency on swig (which
OpenWrt does not ship).

View File

@ -0,0 +1,10 @@
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -118,7 +118,6 @@ dumpimage-mkimage-objs := aisimage.o \
imximage.o \
imx8image.o \
imx8mimage.o \
- kwbimage.o \
lib/md5.o \
lpc32xximage.o \
mxsimage.o \

View File

@ -1,6 +1,6 @@
--- a/Makefile
+++ b/Makefile
@@ -1004,7 +1004,7 @@ quiet_cmd_pad_cat = CAT $@
@@ -1051,7 +1051,7 @@ quiet_cmd_pad_cat = CAT $@
cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; }
quiet_cmd_lzma = LZMA $@

View File

@ -68,7 +68,7 @@
{
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1970,6 +1970,51 @@ static const char *fit_get_image_type_pr
@@ -1962,6 +1962,51 @@ static const char *fit_get_image_type_pr
return "unknown";
}
@ -122,7 +122,7 @@
int arch, int image_type, int bootstage_id,
--- a/include/image.h
+++ b/include/image.h
@@ -1041,6 +1041,7 @@ int fit_parse_subimage(const char *spec,
@@ -996,6 +996,7 @@ int fit_parse_subimage(const char *spec,
ulong *addr, const char **image_name);
int fit_get_subimage_count(const void *fit, int images_noffset);

View File

@ -1,7 +1,7 @@
From 26d4e2e58bf0007db74b47c783785c3305ea1fa0 Mon Sep 17 00:00:00 2001
From afea25576fc92d562b248b783cf03564eb4521da Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 19 Jan 2021 10:58:48 +0800
Subject: [PATCH 17/23] cmd: bootmenu: add ability to select item by shortkey
Subject: [PATCH 12/12] cmd: bootmenu: add ability to select item by shortkey
Add ability to use shortkey to select item for bootmenu command

View File

@ -1,6 +1,6 @@
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -472,6 +472,12 @@ config CMD_ENV_EXISTS
@@ -484,6 +484,12 @@ config CMD_ENV_EXISTS
Check if a variable is defined in the environment for use in
shell scripting.

View File

@ -1,6 +1,6 @@
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -329,6 +329,8 @@ const struct flash_info spi_nor_ids[] =
@@ -353,6 +353,8 @@ const struct flash_info spi_nor_ids[] =
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

View File

@ -1,14 +1,15 @@
--- a/configs/mt7623n_bpir2_defconfig
+++ b/configs/mt7623n_bpir2_defconfig
@@ -4,53 +4,137 @@ CONFIG_ARCH_MEDIATEK=y
@@ -4,52 +4,137 @@ CONFIG_ARCH_MEDIATEK=y
CONFIG_SYS_TEXT_BASE=0x81e00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
-CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
CONFIG_TARGET_MT7623=y
CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
+CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
+CONFIG_USE_DEFAULT_ENV_FILE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@ -116,7 +117,6 @@
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
-CONFIG_DM_MMC=y
+CONFIG_LZMA=y
+CONFIG_MEDIATEK_ETH=y
# CONFIG_MMC_QUIRKS is not set

View File

@ -1,6 +1,6 @@
--- a/configs/mt7623a_unielec_u7623_02_defconfig
+++ b/configs/mt7623a_unielec_u7623_02_defconfig
@@ -52,3 +52,12 @@ CONFIG_TIMER=y
@@ -51,3 +51,12 @@ CONFIG_TIMER=y
CONFIG_MTK_TIMER=y
CONFIG_WDT_MTK=y
CONFIG_LZMA=y

View File

@ -336,14 +336,14 @@
+};
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1007,6 +1007,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
@@ -1104,6 +1104,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
mt7623a-unielec-u7623-02-emmc.dtb \
mt7622-bananapi-bpi-r64.dtb \
+ mt7622-linksys-e8450-ubi.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt7629-rfb.dtb \
mt8512-bm1-emmc.dtb \
mt8183-pumpkin.dtb \
--- /dev/null
+++ b/linksys_e8450_env
@@ -0,0 +1,57 @@

View File

@ -348,14 +348,14 @@
+};
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1008,6 +1008,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
@@ -1105,6 +1105,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7623a-unielec-u7623-02-emmc.dtb \
mt7622-bananapi-bpi-r64.dtb \
mt7622-linksys-e8450-ubi.dtb \
+ mt7622-ubnt-unifi-6-lr.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt7629-rfb.dtb \
mt8512-bm1-emmc.dtb \
mt8183-pumpkin.dtb \
--- /dev/null
+++ b/ubnt_unifi-6-lr_env
@@ -0,0 +1,50 @@
@ -419,7 +419,7 @@
DECLARE_GLOBAL_DATA_PTR;
@@ -410,6 +411,21 @@ static int initr_onenand(void)
@@ -416,6 +417,21 @@ static int initr_onenand(void)
}
#endif
@ -441,7 +441,7 @@
#ifdef CONFIG_MMC
static int initr_mmc(void)
{
@@ -697,6 +713,9 @@ static init_fnc_t init_sequence_r[] = {
@@ -705,6 +721,9 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_CMD_ONENAND
initr_onenand,
#endif