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Code Issues

kernel: bump 6.6 to 6.6.23 

Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.23

Removed upstreamed:
  pending-6.6/735-net-mediatek-mtk_eth_soc-release-MAC_MCR_FORCE_LINK-.patch[1]
  pending-6.6/736-net-ethernet-mtk_eth_soc-fix-PPE-hanging-issue.patch[2]
  mediatek/patches-6.6/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch[3]

Manually rebased:
  mediatek/patches-6.6/100-dts-update-mt7622-rfb1.patch

Added:
  generic/backports-6.6/981-mtd-spinand-Add-support-for-5-byte-IDs.patch[4]

All other patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=1f32abb474c1c9bdb21d9eda74c325a0b3a162e5
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=943c14ece95eb1cf98d477462aebcbfdfd714633
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=6ff01b314149d1cf59caebc29384f0beed21cba4
4. See comments in https://github.com/openwrt/openwrt/pull/14992 regarding broken flogic/xiaomi_redmi-router-ax6000-ubootmod

Build system: x86/64
Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, flogic/glinet_gl-mt6000
Run-tested: x86/64/AMD Cezannei, flogic/xiaomi_redmi-router-ax6000-ubootmod, flogic/glinet_gl-mt6000

Signed-off-by: John Audia <therealgraysky@proton.me>
This commit is contained in:
John Audia 2024-03-27 04:11:32 -04:00 committed by Hauke Mehrtens
parent 06cdc07f8c
commit b04f245c39
38 changed files with 98 additions and 210 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/kernel-6.6
View File

@ -1,2 +1,2 @@
LINUX_VERSION-6.6 = .22
LINUX_KERNEL_HASH-6.6.22 = 23e3e7b56407250f5411bdab95763d0bc4e3a19dfa431d951df7eacabd61a2f4
LINUX_VERSION-6.6 = .23
LINUX_KERNEL_HASH-6.6.23 = 200fd119cb9ef06bcedcdb52be00ba443163eab154295c5831fed9a12211a8b9

2
target/linux/bcm4908/patches-6.6/130-arm64-dts-broadcom-bcmbca-bcm4908-set-brcm-wp-not-co.patch
View File

@ -21,7 +21,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -597,6 +597,7 @@
@@ -594,6 +594,7 @@
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "nand_ctlrdy";

2
target/linux/bcm4908/patches-6.6/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -344,7 +344,7 @@
@@ -341,7 +341,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";

27
target/linux/generic/backport-6.6/981-mtd-spinand-Add-support-for-5-byte-IDs.patch Normal file
View File

@ -0,0 +1,27 @@
From: Ezra Buehler <ezra.buehler@husqvarnagroup.com>
E.g. ESMT chips will return an identification code with a length of 5
bytes. In order to prevent ambiguity, flash chips would actually need to
return IDs that are up to 17 or more bytes long due to JEDEC's
continuation scheme. I understand that if a manufacturer ID is located
in bank N of JEDEC's database (there are currently 16 banks), N - 1
continuation codes (7Fh) need to be added to the identification code
(comprising of manufacturer ID and device ID). However, most flash chip
manufacturers don't seem to implement this (correctly).
Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com>
---
include/linux/mtd/spinand.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -169,7 +169,7 @@
struct spinand_op;
struct spinand_device;
-#define SPINAND_MAX_ID_LEN 4
+#define SPINAND_MAX_ID_LEN 5
/*
* For erase, write and read operation, we got the following timings :
* tBERS (erase) 1ms to 4ms

8
target/linux/generic/pending-6.6/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
View File

@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -7686,6 +7686,48 @@ static void __netdev_adjacent_dev_unlink
@@ -7689,6 +7689,48 @@ static void __netdev_adjacent_dev_unlink
&upper_dev->adj_list.lower);
}
@ -93,7 +93,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static int __netdev_upper_dev_link(struct net_device *dev,
struct net_device *upper_dev, bool master,
void *upper_priv, void *upper_info,
@@ -7737,6 +7779,7 @@ static int __netdev_upper_dev_link(struc
@@ -7740,6 +7782,7 @@ static int __netdev_upper_dev_link(struc
if (ret)
return ret;
@ -101,7 +101,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
ret = notifier_to_errno(ret);
@@ -7833,6 +7876,7 @@ static void __netdev_upper_dev_unlink(st
@@ -7836,6 +7879,7 @@ static void __netdev_upper_dev_unlink(st
__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
@ -109,7 +109,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
@@ -8889,6 +8933,7 @@ int dev_set_mac_address(struct net_devic
@@ -8892,6 +8936,7 @@ int dev_set_mac_address(struct net_devic
return err;
}
dev->addr_assign_type = NET_ADDR_SET;

2
target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -8213,7 +8213,7 @@ static int nft_register_flowtable_net_ho
@@ -8214,7 +8214,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

2
target/linux/generic/pending-6.6/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -4982,6 +4982,8 @@ static int mtk_probe(struct platform_dev
@@ -4981,6 +4981,8 @@ static int mtk_probe(struct platform_dev
* for NAPI to work
*/
init_dummy_netdev(&eth->dummy_dev);

2
target/linux/generic/pending-6.6/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2268,6 +2268,10 @@ mt7530_setup(struct dsa_switch *ds)
@@ -2304,6 +2304,10 @@ mt7530_setup(struct dsa_switch *ds)
return -ENODEV;
}

6
target/linux/generic/pending-6.6/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <net/page_pool/helpers.h>
#include "mtk_eth_soc.h"
@@ -1579,12 +1580,28 @@ static void mtk_wake_queue(struct mtk_et
@@ -1578,12 +1579,28 @@ static void mtk_wake_queue(struct mtk_et
}
}
@ -53,7 +53,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
bool gso = false;
int tx_num;
@@ -1606,6 +1623,18 @@ static netdev_tx_t mtk_start_xmit(struct
@@ -1605,6 +1622,18 @@ static netdev_tx_t mtk_start_xmit(struct
return NETDEV_TX_BUSY;
}
@ -72,7 +72,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/* TSO: fill MSS info in tcp checksum field */
if (skb_is_gso(skb)) {
if (skb_cow_head(skb, 0)) {
@@ -1621,8 +1650,14 @@ static netdev_tx_t mtk_start_xmit(struct
@@ -1620,8 +1649,14 @@ static netdev_tx_t mtk_start_xmit(struct
}
}

50
target/linux/generic/pending-6.6/735-net-mediatek-mtk_eth_soc-release-MAC_MCR_FORCE_LINK-.patch
View File

@ -1,50 +0,0 @@
From ef5976ae4e117fae9a61bb3c0f8319a917a425ea Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Mon, 11 Mar 2024 17:43:28 +0000
Subject: [PATCH] net: mediatek: mtk_eth_soc: release MAC_MCR_FORCE_LINK only when MAC is up
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Clearing bit MAC_MCR_FORCE_LINK which forces the link down too early
can result in MAC ending up in a broken/blocked state.
Fix this by handling this bit in the .mac_link_up and .mac_link_down
calls instead of in .mac_finish.
Fixes: b8fc9f30821ec ("net: ethernet: mediatek: Add basic PHYLINK support")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -678,8 +678,7 @@ static int mtk_mac_finish(struct phylink
mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
mcr_new = mcr_cur;
mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
- MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK |
- MAC_MCR_RX_FIFO_CLR_DIS;
+ MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_RX_FIFO_CLR_DIS;
/* Only update control register when needed! */
if (mcr_new != mcr_cur)
@@ -695,7 +694,7 @@ static void mtk_mac_link_down(struct phy
phylink_config);
u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN);
+ mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK);
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}
@@ -804,7 +803,7 @@ static void mtk_mac_link_up(struct phyli
if (rx_pause)
mcr |= MAC_MCR_FORCE_RX_FC;
- mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN;
+ mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK;
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}

59
target/linux/generic/pending-6.6/736-net-ethernet-mtk_eth_soc-fix-PPE-hanging-issue.patch
View File

@ -1,59 +0,0 @@
From c8262ebbf7ca546dd5ead3c0383a89eb401627ff Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Wed, 13 Mar 2024 17:55:02 +0000
Subject: [PATCH] net: ethernet: mtk_eth_soc: fix PPE hanging issue
A patch to resolve an issue was found in MediaTek's GPL-licensed SDK:
In the mtk_ppe_stop() function, the PPE scan mode is not disabled before
disabling the PPE. This can potentially lead to a hang during the process
of disabling the PPE.
Without this patch, the PPE may experience a hang during the reboot test.
Reference: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/b40da332dfe763932a82f9f62a4709457a15dd6c
Suggested-by: Bc-bocun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_ppe.c | 18 +++++++++++-------
1 file changed, 11 insertions(+), 7 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
@@ -1002,7 +1002,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
MTK_PPE_KEEPALIVE_DISABLE) |
FIELD_PREP(MTK_PPE_TB_CFG_HASH_MODE, 1) |
FIELD_PREP(MTK_PPE_TB_CFG_SCAN_MODE,
- MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
+ MTK_PPE_SCAN_MODE_CHECK_AGE) |
FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
MTK_PPE_ENTRIES_SHIFT);
if (mtk_is_netsys_v2_or_greater(ppe->eth))
@@ -1098,17 +1098,21 @@ int mtk_ppe_stop(struct mtk_ppe *ppe)
mtk_ppe_cache_enable(ppe, false);
- /* disable offload engine */
- ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
- ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
-
/* disable aging */
val = MTK_PPE_TB_CFG_AGE_NON_L4 |
MTK_PPE_TB_CFG_AGE_UNBIND |
MTK_PPE_TB_CFG_AGE_TCP |
MTK_PPE_TB_CFG_AGE_UDP |
- MTK_PPE_TB_CFG_AGE_TCP_FIN;
+ MTK_PPE_TB_CFG_AGE_TCP_FIN |
+ MTK_PPE_TB_CFG_SCAN_MODE;
ppe_clear(ppe, MTK_PPE_TB_CFG, val);
- return mtk_ppe_wait_busy(ppe);
+ if (mtk_ppe_wait_busy(ppe))
+ return -ETIMEDOUT;
+
+ /* disable offload engine */
+ ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
+ ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
+
+ return 0;
}

4
target/linux/generic/pending-6.6/760-net-core-add-optional-threading-for-backlog-processi.patch
View File

@ -157,7 +157,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
void netif_napi_add_weight(struct net_device *dev, struct napi_struct *napi,
int (*poll)(struct napi_struct *, int), int weight)
{
@@ -11348,6 +11419,9 @@ static int dev_cpu_dead(unsigned int old
@@ -11351,6 +11422,9 @@ static int dev_cpu_dead(unsigned int old
raise_softirq_irqoff(NET_TX_SOFTIRQ);
local_irq_enable();
@ -167,7 +167,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#ifdef CONFIG_RPS
remsd = oldsd->rps_ipi_list;
oldsd->rps_ipi_list = NULL;
@@ -11663,6 +11737,7 @@ static int __init net_dev_init(void)
@@ -11666,6 +11740,7 @@ static int __init net_dev_init(void)
INIT_CSD(&sd->defer_csd, trigger_rx_softirq, sd);
spin_lock_init(&sd->defer_lock);

4
target/linux/generic/pending-6.6/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2156,10 +2156,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr
@@ -2192,10 +2192,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr
{
struct dsa_switch *ds = priv->ds;
struct device *dev = priv->dev;
@ -30,7 +30,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
bus = devm_mdiobus_alloc(dev);
if (!bus)
return -ENOMEM;
@@ -2178,7 +2181,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr
@@ -2214,7 +2217,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr
if (priv->irq)
mt7530_setup_mdio_irq(priv);

2
target/linux/generic/pending-6.6/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch
View File

@ -70,7 +70,7 @@ v1 -> v2:
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1819,4 +1819,19 @@ config GPIO_SIM
@@ -1820,4 +1820,19 @@ config GPIO_SIM
endmenu

4
target/linux/generic/pending-6.6/920-mangle_bootargs.patch
View File

@ -31,7 +31,7 @@ Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
help
--- a/init/main.c
+++ b/init/main.c
@@ -608,6 +608,29 @@ static inline void setup_nr_cpu_ids(void
@@ -609,6 +609,29 @@ static inline void setup_nr_cpu_ids(void
static inline void smp_prepare_cpus(unsigned int maxcpus) { }
#endif
@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
/*
* We need to store the untouched command line for future reference.
* We also need to store the touched command line since the parameter
@@ -895,6 +918,7 @@ void start_kernel(void)
@@ -896,6 +919,7 @@ void start_kernel(void)
pr_notice("%s", linux_banner);
early_security_init();
setup_arch(&command_line);

8
target/linux/mediatek/patches-6.6/100-dts-update-mt7622-rfb1.patch
View File

@ -38,10 +38,10 @@
memory@40000000 {
- reg = <0 0x40000000 0 0x20000000>;
+ reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
@@ -132,22 +131,22 @@
@@ -133,22 +132,22 @@
port@0 {
reg = <0>;
@ -68,7 +68,7 @@
};
port@4 {
@@ -239,7 +238,22 @@
@@ -240,7 +239,22 @@
status = "okay";
};
@ -91,7 +91,7 @@
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
@@ -516,11 +530,11 @@
@@ -517,11 +531,11 @@
};
&sata {

4
target/linux/mediatek/patches-6.6/106-dts-mt7622-disable_btif.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -108,10 +108,6 @@
@@ -109,10 +109,6 @@
status = "disabled";
};
@ -13,7 +13,7 @@
pinctrl-0 = <&irrx_pins>;
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -89,10 +89,6 @@
@@ -90,10 +90,6 @@
status = "disabled";
};

2
target/linux/mediatek/patches-6.6/112-dts-fix-bpi64-lan-names.patch
View File

@ -8,7 +8,7 @@
};
chosen {
@@ -164,22 +165,22 @@
@@ -165,22 +166,22 @@
port@1 {
reg = <1>;

2
target/linux/mediatek/patches-6.6/114-dts-bpi64-disable-rtc.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -587,6 +587,10 @@
@@ -588,6 +588,10 @@
status = "okay";
};

2
target/linux/mediatek/patches-6.6/131-dts-mt7622-add-snand-support.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -533,6 +533,65 @@
@@ -534,6 +534,65 @@
status = "disabled";
};

4
target/linux/mediatek/patches-6.6/140-dts-fix-wmac-support-for-mt7622-rfb1.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -574,7 +574,7 @@
@@ -575,7 +575,7 @@
reg = <0x140000 0x0080000>;
};
@ -9,7 +9,7 @@
label = "Factory";
reg = <0x1c0000 0x0100000>;
};
@@ -635,5 +635,6 @@
@@ -636,5 +636,6 @@
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&wmac_pins>;

30
target/linux/mediatek/patches-6.6/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch
View File

@ -1,30 +0,0 @@
From fc157139e6b7f8dfb6430ac7191ba754027705e8 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sun, 18 Feb 2024 01:59:59 +0000
Subject: [PATCH] clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical
Without the SGM_REG_SEL clock enabled the system freezes if trying to
access registers used by MT7981 clock drivers itself.
Mark SGM_REG_SEL as critical to make sure it is always enabled to
prevent freezes on boot depending on probe order.
Fixes: 813c3b53b55ba ("clk: mediatek: add MT7981 clock support")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/clk/mediatek/clk-mt7981-topckgen.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/clk/mediatek/clk-mt7981-topckgen.c
+++ b/drivers/clk/mediatek/clk-mt7981-topckgen.c
@@ -357,8 +357,9 @@ static const struct mtk_mux top_muxes[]
MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_325M_SEL, "sgm_325m_sel",
sgm_325m_parents, 0x050, 0x054, 0x058, 8, 1, 15,
0x1C0, 21),
- MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_REG_SEL, "sgm_reg_sel", sgm_reg_parents,
- 0x050, 0x054, 0x058, 16, 1, 23, 0x1C0, 22),
+ MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_REG_SEL, "sgm_reg_sel", sgm_reg_parents,
+ 0x050, 0x054, 0x058, 16, 1, 23, 0x1C0, 22,
+ CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP97B_SEL, "eip97b_sel", eip97b_parents,
0x050, 0x054, 0x058, 24, 3, 31, 0x1C0, 23),
/* CLK_CFG_6 */

2
target/linux/mediatek/patches-6.6/331-mt7622-rfb1-enable-bmt.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -547,6 +547,7 @@
@@ -548,6 +548,7 @@
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand-ecc-engine = <&snfi>;

2
target/linux/mediatek/patches-6.6/431-drivers-spi-mt65xx-Move-chip_config-to-driver-s-priv.patch
View File

@ -97,7 +97,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
if (mdata->dev_comp->need_pad_sel && spi_get_csgpiod(spi, 0))
/* CS de-asserted, gpiolib will handle inversion */
gpiod_direction_output(spi_get_csgpiod(spi, 0), 0);
@@ -1138,6 +1126,10 @@ static int mtk_spi_probe(struct platform
@@ -1140,6 +1128,10 @@ static int mtk_spi_probe(struct platform
mdata = spi_master_get_devdata(master);
mdata->dev_comp = device_get_match_data(dev);

4
target/linux/mediatek/patches-6.6/434-drivers-spi-mt65xx-Add-controller-s-calibration-para.patch
View File

@ -11,7 +11,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -832,6 +832,21 @@ static irqreturn_t mtk_spi_interrupt(int
@@ -834,6 +834,21 @@ static irqreturn_t mtk_spi_interrupt(int
return IRQ_HANDLED;
}
@ -33,7 +33,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
static int mtk_spi_mem_adjust_op_size(struct spi_mem *mem,
struct spi_mem_op *op)
{
@@ -1122,6 +1137,7 @@ static int mtk_spi_probe(struct platform
@@ -1124,6 +1139,7 @@ static int mtk_spi_probe(struct platform
master->setup = mtk_spi_setup;
master->set_cs_timing = mtk_spi_set_hw_cs_timing;
master->use_gpio_descriptors = true;

6
target/linux/mediatek/patches-6.6/830-v6.7-39-thermal-lvts-Convert-to-platform-remove-callback-ret.patch
View File

@ -29,7 +29,7 @@ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -1241,7 +1241,7 @@ static int lvts_probe(struct platform_de
@@ -1243,7 +1243,7 @@ static int lvts_probe(struct platform_de
return 0;
}
@ -38,7 +38,7 @@ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
{
struct lvts_domain *lvts_td;
int i;
@@ -1252,8 +1252,6 @@ static int lvts_remove(struct platform_d
@@ -1254,8 +1254,6 @@ static int lvts_remove(struct platform_d
lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], false);
lvts_debugfs_exit(lvts_td);
@ -47,7 +47,7 @@ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
}
static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
@@ -1354,7 +1352,7 @@ MODULE_DEVICE_TABLE(of, lvts_of_match);
@@ -1356,7 +1354,7 @@ MODULE_DEVICE_TABLE(of, lvts_of_match);
static struct platform_driver lvts_driver = {
.probe = lvts_probe,

14
target/linux/mediatek/patches-6.6/830-v6.7-40-thermal-drivers-mediatek-lvts_thermal-Make-coeff-con.patch
View File

@ -126,7 +126,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
bool should_update_thresh;
lvts_sensor->low_thresh = low;
@@ -692,7 +701,7 @@ static int lvts_calibration_read(struct
@@ -694,7 +703,7 @@ static int lvts_calibration_read(struct
return 0;
}
@ -135,7 +135,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
{
u32 gt;
@@ -701,7 +710,7 @@ static int lvts_golden_temp_init(struct
@@ -703,7 +712,7 @@ static int lvts_golden_temp_init(struct
if (gt && gt < LVTS_GOLDEN_TEMP_MAX)
golden_temp = gt;
@ -144,7 +144,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
return 0;
}
@@ -724,7 +733,7 @@ static int lvts_ctrl_init(struct device
@@ -726,7 +735,7 @@ static int lvts_ctrl_init(struct device
* The golden temp information is contained in the first chunk
* of efuse data.
*/
@ -153,7 +153,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
if (ret)
return ret;
@@ -735,6 +744,7 @@ static int lvts_ctrl_init(struct device
@@ -737,6 +746,7 @@ static int lvts_ctrl_init(struct device
for (i = 0; i < lvts_data->num_lvts_ctrl; i++) {
lvts_ctrl[i].base = lvts_td->base + lvts_data->lvts_ctrl[i].offset;
@ -161,7 +161,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
ret = lvts_sensor_init(dev, &lvts_ctrl[i],
&lvts_data->lvts_ctrl[i]);
@@ -758,7 +768,8 @@ static int lvts_ctrl_init(struct device
@@ -760,7 +770,8 @@ static int lvts_ctrl_init(struct device
* after initializing the calibration.
*/
lvts_ctrl[i].hw_tshut_raw_temp =
@ -171,7 +171,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
lvts_ctrl[i].low_thresh = INT_MIN;
lvts_ctrl[i].high_thresh = INT_MIN;
@@ -1223,6 +1234,8 @@ static int lvts_probe(struct platform_de
@@ -1225,6 +1236,8 @@ static int lvts_probe(struct platform_de
if (irq < 0)
return irq;
@ -180,7 +180,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-4-linux@fw-web.de
ret = lvts_domain_init(dev, lvts_td, lvts_data);
if (ret)
return dev_err_probe(dev, ret, "Failed to initialize the lvts domain\n");
@@ -1336,11 +1349,15 @@ static const struct lvts_ctrl_data mt819
@@ -1338,11 +1351,15 @@ static const struct lvts_ctrl_data mt819
static const struct lvts_data mt8195_lvts_mcu_data = {
.lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),

6
target/linux/mediatek/patches-6.6/830-v6.7-42-thermal-drivers-mediatek-lvts_thermal-Add-mt7988-sup.patch
View File

@ -33,7 +33,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de
#define LVTS_HW_SHUTDOWN_MT8195 105000
#define LVTS_MINIMUM_THRESHOLD 20000
@@ -1267,6 +1270,33 @@ static void lvts_remove(struct platform_
@@ -1269,6 +1272,33 @@ static void lvts_remove(struct platform_
lvts_debugfs_exit(lvts_td);
}
@ -67,7 +67,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de
static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
{
.cal_offset = { 0x04, 0x07 },
@@ -1346,6 +1376,13 @@ static const struct lvts_ctrl_data mt819
@@ -1348,6 +1378,13 @@ static const struct lvts_ctrl_data mt819
}
};
@ -81,7 +81,7 @@ Link: https://lore.kernel.org/r/20230922055020.6436-5-linux@fw-web.de
static const struct lvts_data mt8195_lvts_mcu_data = {
.lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
@@ -1361,6 +1398,7 @@ static const struct lvts_data mt8195_lvt
@@ -1363,6 +1400,7 @@ static const struct lvts_data mt8195_lvt
};
static const struct of_device_id lvts_of_match[] = {

4
target/linux/mediatek/patches-6.6/830-v6.7-45-thermal-drivers-mediatek-lvts_thermal-Add-suspend-an.patch
View File

@ -24,7 +24,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-3-bero@baylibre.com
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -1297,6 +1297,38 @@ static const struct lvts_ctrl_data mt798
@@ -1299,6 +1299,38 @@ static const struct lvts_ctrl_data mt798
}
};
@ -63,7 +63,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-3-bero@baylibre.com
static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
{
.cal_offset = { 0x04, 0x07 },
@@ -1405,12 +1437,17 @@ static const struct of_device_id lvts_of
@@ -1407,12 +1439,17 @@ static const struct of_device_id lvts_of
};
MODULE_DEVICE_TABLE(of, lvts_of_match);

6
target/linux/mediatek/patches-6.6/830-v6.7-47-thermal-drivers-mediatek-lvts_thermal-Add-mt8192-sup.patch
View File

@ -34,7 +34,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com
#define LVTS_HW_SHUTDOWN_MT8195 105000
#define LVTS_MINIMUM_THRESHOLD 20000
@@ -1329,6 +1330,88 @@ static int lvts_resume(struct device *de
@@ -1331,6 +1332,88 @@ static int lvts_resume(struct device *de
return 0;
}
@ -123,7 +123,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com
static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
{
.cal_offset = { 0x04, 0x07 },
@@ -1415,6 +1498,16 @@ static const struct lvts_data mt7988_lvt
@@ -1417,6 +1500,16 @@ static const struct lvts_data mt7988_lvt
.temp_offset = LVTS_COEFF_B_MT7988,
};
@ -140,7 +140,7 @@ Link: https://lore.kernel.org/r/20231017190545.157282-4-bero@baylibre.com
static const struct lvts_data mt8195_lvts_mcu_data = {
.lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
@@ -1431,6 +1524,8 @@ static const struct lvts_data mt8195_lvt
@@ -1433,6 +1526,8 @@ static const struct lvts_data mt8195_lvt
static const struct of_device_id lvts_of_match[] = {
{ .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data },

2
target/linux/mediatek/patches-6.6/900-dts-mt7622-bpi-r64-aliases-for-dtoverlay.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -311,7 +311,7 @@
@@ -312,7 +312,7 @@
/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
* SATA functions. i.e. output-high: PCIe, output-low: SATA
*/

2
target/linux/mediatek/patches-6.6/910-dts-mt7622-bpi-r64-wifi-eeprom.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -638,5 +638,28 @@
@@ -639,5 +639,28 @@
};
&wmac {

6
target/linux/mediatek/patches-6.6/911-dts-mt7622-bpi-r64-add-rootdisk.patch
View File

@ -10,7 +10,7 @@
};
cpus {
@@ -233,6 +236,26 @@
@@ -234,6 +237,26 @@
assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
non-removable;
@ -37,7 +37,7 @@
};
&mmc1 {
@@ -248,6 +271,26 @@
@@ -249,6 +272,26 @@
vqmmc-supply = <&reg_3p3v>;
assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
@ -64,7 +64,7 @@
};
&nandc {
@@ -281,15 +324,30 @@
@@ -282,15 +325,30 @@
read-only;
};

2
target/linux/mediatek/patches-6.6/930-spi-mt65xx-enable-sel-clk.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -1226,8 +1226,15 @@ static int mtk_spi_probe(struct platform
@@ -1228,8 +1228,15 @@ static int mtk_spi_probe(struct platform
if (ret < 0)
return dev_err_probe(dev, ret, "failed to enable hclk\n");

6
target/linux/mediatek/patches-6.6/941-arm64-dts-mt7986-move-cpuboot-in-a-dedicated-node.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
};
timer {
@@ -544,10 +538,11 @@
@@ -543,10 +537,11 @@
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
@ -38,7 +38,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
};
wed1: wed@15011000 {
@@ -557,10 +552,11 @@
@@ -556,10 +551,11 @@
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
@ -52,7 +52,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
};
wo_ccif0: syscon@151a5000 {
@@ -577,6 +573,11 @@
@@ -576,6 +572,11 @@
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
};

6
target/linux/mediatek/patches-6.6/945-arm64-dts-mt7986-move-ilm-in-a-dedicated-node.patch
View File

@ -34,7 +34,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
wo_data: wo-data@4fd80000 {
reg = <0 0x4fd80000 0 0x240000>;
no-map;
@@ -537,11 +527,10 @@
@@ -536,11 +526,10 @@
reg = <0 0x15010000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
@ -49,7 +49,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
@@ -551,11 +540,10 @@
@@ -550,11 +539,10 @@
reg = <0 0x15011000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
@ -64,7 +64,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
@@ -573,6 +561,16 @@
@@ -572,6 +560,16 @@
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
};

6
target/linux/mediatek/patches-6.6/946-arm64-dts-mt7986-move-dlm-in-a-dedicated-node.patch
View File

@ -34,7 +34,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
};
timer {
@@ -527,10 +517,11 @@
@@ -526,10 +516,11 @@
reg = <0 0x15010000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
@ -48,7 +48,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
@@ -540,10 +531,11 @@
@@ -539,10 +530,11 @@
reg = <0 0x15011000 0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
@ -62,7 +62,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
mediatek,wo-cpuboot = <&wo_cpuboot>;
};
@@ -571,6 +563,16 @@
@@ -570,6 +562,16 @@
reg = <0 0x151f0000 0 0x8000>;
};

4
target/linux/qualcommax/patches-6.6/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch
View File

@ -30,7 +30,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
+ msi-parent = <&gic_v2m0>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 142
interrupt-map = <0 0 0 1 &intc 0 0 142
@@ -930,8 +929,7 @@
ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
@ -40,4 +40,4 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
+ msi-parent = <&gic_v2m0>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 75
interrupt-map = <0 0 0 1 &intc 0 0 75