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mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-11-18 14:47:46 +01:00

clean up atheros pci code

SVN-Revision: 12337
This commit is contained in:
John Crispin 2008-08-18 11:49:05 +00:00
parent f27fd2ecc3
commit 874ca11412

@ -30,7 +30,6 @@
#define AR531X_MEM_BASE 0x80800000UL
#define AR531X_MEM_SIZE 0x00ffffffUL
#define AR531X_IO_SIZE 0x00007fffUL
#define IDSEL_SHIFT 13
static spinlock_t ar531x_pci_lock = SPIN_LOCK_UNLOCKED;
@ -42,8 +41,7 @@ static int config_access(int busno, int dev, int func, int where, int size, u32
u32 reg;
unsigned long flags;
int ret = -1;
if ((busno != 0) || (dev > 3) || (func > 2))
if ((busno != 0) || ((dev != 0) && (dev != 3)) || (func > 2))
return ret;
spin_lock_irqsave(&ar531x_pci_lock, flags);
@ -111,14 +109,14 @@ struct pci_ops ar531x_pci_ops = {
static struct resource ar531x_mem_resource = {
.name = "AR531x PCI MEM",
.start = AR531X_MEM_BASE,
.end = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1,
.end = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 + 0x4000000,
.flags = IORESOURCE_MEM,
};
static struct resource ar531x_io_resource = {
.name = "AR531x PCI I/O",
.start = 0,
.end = AR531X_IO_SIZE,
.start = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE,
.end = AR531X_MEM_BASE + AR531X_MEM_SIZE - 1,
.flags = IORESOURCE_IO,
};
@ -126,6 +124,8 @@ struct pci_controller ar531x_pci_controller = {
.pci_ops = &ar531x_pci_ops,
.mem_resource = &ar531x_mem_resource,
.io_resource = &ar531x_io_resource,
.mem_offset = 0x00000000UL,
.io_offset = 0x00000000UL,
};
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
@ -189,7 +189,9 @@ int __init ar5315_pci_init(void)
printk("AR531x PCI init... \n");
cfgaddr = (u32) ioremap_nocache(0x80000000, 1*1024*1024); /* Remap PCI config space */
set_io_port_base((unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_IO_SIZE - 1, AR531X_IO_SIZE)); /* PCI I/O space */
ar531x_pci_controller.io_map_base =
(unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_MEM_SIZE, AR531X_IO_SIZE);
set_io_port_base(ar531x_pci_controller.io_map_base); /* PCI I/O space */
reg = sysRegRead(AR5315_RESET);
sysRegWrite(AR5315_RESET, reg | AR5315_RESET_PCIDMA);
@ -244,6 +246,12 @@ int __init ar5315_pci_init(void)
udelay(500*1000);
/* dirty hack - anyone with a datasheet that knows the memory map ? */
ioport_resource.start = 0x10000000;
ioport_resource.end = 0xffffffff;
iomem_resource.start = 0x10000000;
iomem_resource.end = 0xffffffff;
register_pci_controller(&ar531x_pci_controller);
printk("done\n");