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Code Issues

adds support to build uboot for arv452

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SVN-Revision: 20408
This commit is contained in:
John Crispin 2010-03-24 18:28:07 +00:00
parent 1f1ad83bc2
commit 6cb7284fe0
4 changed files with 49 additions and 12 deletions
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5
package/uboot-ifxmips/Config.in Normal file
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@ -0,0 +1,5 @@
config IFXMIPS_UBOOT_A800
bool "add ARV452 Switch bringup hack"
depends on PACKAGE_uboot-ifxmips
help
Say Y, if you have a arv452 board (wav-281, A800, ..)

13
package/uboot-ifxmips/Makefile
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@ -34,6 +34,10 @@ define Build/Prepare
find $(PKG_BUILD_DIR) -name .svn | $(XARGS) rm -rf
endef
define Package/uboot-ifxmips/config
source "$(SOURCE)/Config.in"
endef
UBOOT_CONFIG:=danube
UBOOT_MAKE_OPTS:=\
@ -43,6 +47,11 @@ UBOOT_MAKE_OPTS:=\
PLATFORM_CPU=mips32r2 \
UBOOT_RAM_TEXT_BASE=0xA0400000
A800_FIX:=
ifeq ($(CONFIG_IFXMIPS_UBOOT_A800),y)
A800_FIX += -DA800_SWITCH
endif
define Build/Configure
$(MAKE) -s -C $(PKG_BUILD_DIR) \
$(UBOOT_MAKE_OPTS) \
@ -52,7 +61,7 @@ endef
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
$(UBOOT_MAKE_OPTS) \
OWRT_FLAGS="-DTEXT_BASE=0xa0400000" \
OWRT_FLAGS="-DTEXT_BASE=0xa0400000 ${A800_FIX}" \
ifx_all
$(CP) $(PKG_BUILD_DIR)/u-boot.srec $(PKG_BUILD_DIR)/asc.srec
$(PKG_BUILD_DIR)/gct \
@ -61,7 +70,7 @@ define Build/Compile
$(PKG_BUILD_DIR)/u-boot.asc
$(MAKE) -C $(PKG_BUILD_DIR) \
$(UBOOT_MAKE_OPTS) \
OWRT_FLAGS="-DDANUBE_BOOT_FROM_EBU=1 -DTEXT_BASE=0xB0000000" \
OWRT_FLAGS="-DDANUBE_BOOT_FROM_EBU=1 -DTEXT_BASE=0xB0000000 ${A800_FIX}" \
clean ifx_all
endef

10
package/uboot-ifxmips/files/board/ifx/danube/flash.c
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@ -83,12 +83,10 @@ unsigned long flash_init (void)
unsigned long size = 0;
int i;
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
/* Init: no FLASHes known */
for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) { // 1 bank
ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2; // 0xb0000000, 0xb4000000
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
volatile ulong * buscon = (ulong *)
((i == 0) ? DANUBE_EBU_BUSCON0 : DANUBE_EBU_BUSCON1);
@ -96,12 +94,10 @@ unsigned long flash_init (void)
// *buscon &= ~AMAZON_EBU_BUSCON0_WRDIS;
/* Enable write protection */
*buscon |= DANUBE_EBU_BUSCON0_WRDIS;
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
#if 1
memset(&flash_info[i], 0, sizeof(flash_info_t));
#endif
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
flash_info[i].size =
flash_get_size((FPW *)flashbase, &flash_info[i]);
@ -463,23 +459,19 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
// asm("SYNC");
switch (addr[1] & 0xff) {
case (uchar)AMD_MANUFACT:
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
info->flash_id = FLASH_MAN_AMD;
break;
case (uchar)INTEL_MANUFACT: // 0x0089
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
info->flash_id = FLASH_MAN_INTEL; //0x00300000
break;
//joelin for MXIC
case (uchar)MX_MANUFACT: // 0x00c2
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
info->flash_id = FLASH_MAN_MX ;//0x00030000
break;
default:
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
@ -489,11 +481,9 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
break;*/
}
printf("%s:%s[%d] %08lx\n", __FILE__, __func__, __LINE__, addr[0]);
/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
if (info->flash_id != FLASH_UNKNOWN) switch (addr[0]) {
case (FPW)EON_ID_EN29LV320B:
printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
info->flash_id += FLASH_29LV320B;
info->sector_count = 71;
info->size = 0x00400000 * (sizeof(FPW)/2);

33
package/uboot-ifxmips/patches/130-a800.patch Normal file
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@ -0,0 +1,33 @@
Index: u-boot-1.1.5/drivers/ifx_sw.c
===================================================================
--- u-boot-1.1.5.orig/drivers/ifx_sw.c 2010-03-24 19:21:19.000000000 +0100
+++ u-boot-1.1.5/drivers/ifx_sw.c 2010-03-24 19:23:09.000000000 +0100
@@ -118,7 +118,7 @@
{
struct eth_device *dev;
unsigned short chipid;
-
+ int i;
#if 0
printf("Entered danube_switch_initialize()\n");
#endif
@@ -130,6 +130,19 @@
}
memset(dev, 0, sizeof(*dev));
+#ifdef A800_SWITCH
+ printf ("bring up a800 switch and leds\n");
+ *EBU_CON_1 = 0x1e7ff;
+ *EBU_ADDR_SEL_1 = 0x14000001;
+
+ *((volatile u16*)0xb4000000) = 0x0;
+ for(i = 0; i < 1000; i++)
+ udelay(1000);
+ *((volatile u16*)0xb4000000) = (1 << 10);
+ *EBU_CON_1 = 0x8001e7ff;
+#define CLK_OUT2_25MHZ
+#endif
+
danube_dma_init();
danube_init_switch_chip(REV_MII_MODE);