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Code Issues

ramips: mt7620: enable all ports unconditionally

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This patch make all mt7620 ephy ports turned on.
It is necessary for some JBOOT devices.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
This commit is contained in:
Pawel Dembicki 2018-07-18 04:31:36 +00:00 committed by Mathias Kresin
parent 5762efd8b2
commit 4877ad44c7
1 changed files with 10 additions and 1 deletions
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11
target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c
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@ -83,6 +83,8 @@ static int mt7620_mdio_mode(struct device_node *eth_node)
static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
{ {
u32 i;
u32 val;
u32 is_BGA = (rt_sysc_r32(0x0c) >> 16) & 1; u32 is_BGA = (rt_sysc_r32(0x0c) >> 16) & 1;
rt_sysc_w32(rt_sysc_r32(SYSC_REG_CFG1) | BIT(8), SYSC_REG_CFG1); rt_sysc_w32(rt_sysc_r32(SYSC_REG_CFG1) | BIT(8), SYSC_REG_CFG1);
@ -151,6 +153,14 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
/* global page 1 */ /* global page 1 */
_mt7620_mii_write(gsw, 1, 31, 0x1000); _mt7620_mii_write(gsw, 1, 31, 0x1000);
_mt7620_mii_write(gsw, 1, 17, 0xe7f8); _mt7620_mii_write(gsw, 1, 17, 0xe7f8);
/* turn on all PHYs */
for (i = 0; i <= 4; i++) {
val = _mt7620_mii_read(gsw, i, 0);
val &= ~BIT(11);
_mt7620_mii_write(gsw, i, 0, val);
}
} }
/* global page 0 */ /* global page 0 */
@ -187,7 +197,6 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
_mt7620_mii_write(gsw, 4, 30, 0xa000); _mt7620_mii_write(gsw, 4, 30, 0xa000);
_mt7620_mii_write(gsw, 4, 4, 0x05e1); _mt7620_mii_write(gsw, 4, 4, 0x05e1);
_mt7620_mii_write(gsw, 4, 16, 0x1313); _mt7620_mii_write(gsw, 4, 16, 0x1313);
_mt7620_mii_write(gsw, 4, 0, 0x3100);
pr_info("gsw: setting port4 to ephy mode\n"); pr_info("gsw: setting port4 to ephy mode\n");
} else if (!mdio_mode) { } else if (!mdio_mode) {
u32 val = rt_sysc_r32(SYSC_REG_CFG1); u32 val = rt_sysc_r32(SYSC_REG_CFG1);