mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-10-18 13:29:16 +02:00
mediatek: add support for Adtran SmartRG Bonanza Peak series
The Bonanza Peak series are a couple of MT7986-powered 2.5 GBit/s Wi-Fi 6 residential gateway, access point and mesh router products. All of them come with an eMMC to boot from, are powered via USB-C and got a USB 3.0 type-A port. All of them got a Dialog (Renesas) DA14531 Bluetooth module connected via UART. If the device was previously running stock firmware, the BT chip's internal flash has been loaded with firmware and it can be attached using hciattach when using OpenWrt. SOC: MediaTek MT7986A RAM: 2 GiB DDR4 eMMC: 8 GiB Bluetooth: BLE5 (DA14531) Serial: 3.3V level, 115200 8n1 on 4-pin connector * SDG-8612 - Dual-band RJ-45 gateway 2x 2.5G MaxLinear PHY for WAN port 3x 1GE LAN ports via MT7531 switch * SDG-8614 - Dual-band SFP gateway 1x SFP cage with up to 2.5G speed 1x 2.5G MaxLinear PHY for LAN port 3x 1GE LAN ports via MT7531 switch * SDG-8622 - Tri-band mesh router 2x 2.5G MaxLinear PHY The MT7986 2G and 5G are used as 2G and 5G high band. There’s a MT7915 PCIe card for 5G low band. * SDG-8632 - Tri-band mesh router with 6 GHz 2x 2.5G MaxLinear PHY The MT7986 serves the 2G and 6G bands. There’s a MT7915 PCIe card for 5G. Installation via U-Boot serial console: 0. setup TFTP server with IP 192.168.1.10/24, place initramfs image renamed to openwrt.XXX where XXX is the internal product number: SDG-8612: XXX = 412 SDG-8614: XXX = 414 SDG-8622: XXX = 422 SDG-8632: XXX = 432 1. connect to the serial console and power on the device. Interrupt the bootloader by pressing 'st' 2. setenv boot_mode openwrt ; saveenv 3. run boot1 Load firmware via TFTP and write to flash 4. run boot2 Now OpenWrt initramfs should boot 5. upload sysupgrade.bin via scp to /tmp 6. sysupgrade Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle
parent
a270f61c00
commit
3aa686f8d4
@ -1,5 +1,10 @@
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set_preinit_iface() {
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case $(board_name) in
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smartrg,sdg-8622|\
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smartrg,sdg-8632)
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ip link set lan up
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ifname=lan
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;;
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glinet,gl-mt3000)
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ip link set eth1 up
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ifname=eth1
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76
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8612.dts
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76
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8612.dts
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@ -0,0 +1,76 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 SmartRG Inc.
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* Author: Chad Monroe <chad.monroe@smartrg.com>
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*/
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#include "mt7986a-smartrg-bonanza-peak.dtsi"
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/ {
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model = "SmartRG SDG-8612";
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compatible = "smartrg,sdg-8612", "mediatek,mt7986a";
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};
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&gmac0 {
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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&gmac1 {
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phy-handle = <&phy6>;
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};
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&mdio {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port5: port@5 {
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reg = <5>;
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label = "lan4";
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phy-mode = "2500base-x";
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phy-handle = <&phy5>;
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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&wifi {
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ieee80211-freq-limit = <2400000 2500000>, <5170000 5835000>;
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};
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124
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8614.dts
Normal file
124
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8614.dts
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@ -0,0 +1,124 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 SmartRG Inc.
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* Author: Chad Monroe <chad.monroe@smartrg.com>
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*/
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#include "mt7986a-smartrg-bonanza-peak.dtsi"
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/ {
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model = "SmartRG SDG-8614";
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compatible = "smartrg,sdg-8614", "mediatek,mt7986a";
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/* SFP1 cage (WAN) */
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i2c_sfp1: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&pio 62 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&pio 63 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp1: sfp1 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c_sfp1>;
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los-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&pio 65 GPIO_ACTIVE_LOW>;
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rate-select0-gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
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rate-select1-gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&pio 64 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <3000>;
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};
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leds {
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compatible = "gpio-leds";
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sfp_red {
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color = <LED_COLOR_ID_RED>;
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function = "sfp";
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function-enumerator = <1>;
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gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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sfp_green {
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color = <LED_COLOR_ID_GREEN>;
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function = "sfp";
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function-enumerator = <0>;
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gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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};
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&mux_sel {
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output-low;
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/delete-node/ output-high;
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};
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&gmac0 {
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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&gmac1 {
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sfp = <&sfp1>;
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managed = "in-band-status";
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};
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&mdio {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port5: port@5 {
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reg = <5>;
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label = "lan4";
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phy-mode = "2500base-x";
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phy-handle = <&phy5>;
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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&wifi {
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ieee80211-freq-limit = <2400000 2500000>, <5170000 5835000>;
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};
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38
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8622.dts
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38
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8622.dts
Normal file
@ -0,0 +1,38 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 SmartRG Inc.
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* Author: Chad Monroe <chad.monroe@smartrg.com>
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*/
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#include "mt7986a-smartrg-bonanza-peak.dtsi"
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/ {
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model = "SmartRG SDG-8622";
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compatible = "smartrg,sdg-8622", "mediatek,mt7986a";
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};
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&gmac0 {
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phy-handle = <&phy5>;
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label = "lan";
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};
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&gmac1 {
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phy-handle = <&phy6>;
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};
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&pcie {
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status = "okay";
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};
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&pcie_phy {
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status = "okay";
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};
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&radio0 {
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ieee80211-freq-limit = <5170000 5330000>;
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};
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&wifi {
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ieee80211-freq-limit = <2400000 2500000>, <5490000 5835000>;
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};
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38
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8632.dts
Normal file
38
target/linux/mediatek/dts/mt7986a-smartrg-SDG-8632.dts
Normal file
@ -0,0 +1,38 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 SmartRG Inc.
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* Author: Chad Monroe <chad.monroe@smartrg.com>
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*/
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#include "mt7986a-smartrg-bonanza-peak.dtsi"
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/ {
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model = "SmartRG SDG-8632";
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compatible = "smartrg,sdg-8632", "mediatek,mt7986a";
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};
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&gmac0 {
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phy-handle = <&phy5>;
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label = "lan";
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};
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&gmac1 {
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phy-handle = <&phy6>;
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};
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&pcie {
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status = "okay";
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};
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&pcie_phy {
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status = "okay";
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};
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&radio0 {
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ieee80211-freq-limit = <5170000 5835000>;
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};
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&wifi {
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ieee80211-freq-limit = <2400000 2500000>, <5945000 7125000>;
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};
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481
target/linux/mediatek/dts/mt7986a-smartrg-bonanza-peak.dtsi
Normal file
481
target/linux/mediatek/dts/mt7986a-smartrg-bonanza-peak.dtsi
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@ -0,0 +1,481 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 SmartRG Inc.
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* Author: Chad Monroe <chad.monroe@smartrg.com>
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7986a.dtsi"
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/ {
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aliases {
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serial0 = &uart0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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led-boot = &led_status_green;
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led-failsafe = &led_status_red;
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led-running = &led_status_white;
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led-upgrade = &led_status_blue;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "root=/dev/mmcblk0p5";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/delete-node/ramoops@42ff0000;
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bootdata_reserved: bootdata@45000000 {
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no-map;
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reg = <0x0 0x45000000 0x0 0x00001000>;
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};
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ramoops_reserved: ramoops@45001000 {
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no-map;
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compatible = "ramoops";
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reg = <0x0 0x45001000 0x0 0x00140000>;
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ftrace-size = <0x20000>;
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record-size = <0x20000>;
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console-size = <0x20000>;
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pmsg-size = <0x80000>;
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};
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};
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bootdata {
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compatible = "bootdata";
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memory-region = <&bootdata_reserved>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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#cooling-cells = <2>;
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pwms = <&pwm 1 40000 0>;
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/**
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* set fan speed
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*
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* 0 = off
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* 51 = 20% duty cycle (minimum supported)
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* 61 = 24% duty cycle (2020 RPM)
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* 77 = 30% duty cycle (3000 RPM)
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* 102 = 40% duty cycle (3600 RPM)
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* 255 = 100% duty cycle
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*/
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cooling-levels = <51 61 77 102>;
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interrupt-parent = <&pio>;
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interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
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pulses-per-revolution = <2>;
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status = "okay";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&button_pins>;
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 17 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&cpu_thermal {
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cooling-maps {
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cpu-active-high {
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/* active: set fan to cooling level 3 */
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cooling-device = <&fan 3 3>;
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trip = <&cpu_trip_active_high>;
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};
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cpu-active-medium {
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/* active: set fan to cooling level 2 */
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cooling-device = <&fan 2 2>;
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trip = <&cpu_trip_active_medium>;
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};
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cpu-active-low {
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/* active: set fan to cooling level 1 */
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cooling-device = <&fan 1 1>;
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trip = <&cpu_trip_active_low>;
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};
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cpu-active-silent {
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/* active: set fan to cooling level 0 */
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cooling-device = <&fan 0 0>;
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trip = <&cpu_trip_active_silent>;
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};
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};
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trips {
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cpu_trip_active_high: active-high {
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temperature = <110000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_medium: active-medium {
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temperature = <80000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_low: active-low {
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temperature = <60000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_trip_active_silent: active-silent {
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temperature = <40000>;
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hysteresis = <2000>;
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type = "active";
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};
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};
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};
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&crypto {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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};
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gmac1: mac@1 {
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label = "wan";
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||||
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <1500000>;
|
||||
reset-post-delay-us = <1000000>;
|
||||
|
||||
phy5: ethernet-phy@5 {
|
||||
/* GPY211 */
|
||||
compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
|
||||
reg = <5>;
|
||||
|
||||
mxl,led-drive-vdd;
|
||||
mxl,led-config = <0x30 0x40 0x80 0x0>;
|
||||
};
|
||||
|
||||
phy6: ethernet-phy@6 {
|
||||
/* GPY211 */
|
||||
compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
|
||||
reg = <6>;
|
||||
|
||||
mxl,led-drive-vdd;
|
||||
mxl,led-config = <0x30 0x40 0x80 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
&crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&mmc0_pins_default>;
|
||||
pinctrl-1 = <&mmc0_pins_uhs>;
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
hs400-ds-delay = <0x14014>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
vqmmc-supply = <®_1p8v>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_pins>;
|
||||
status = "disabled";
|
||||
|
||||
slot0: pcie@0,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
|
||||
radio0: mt7915@0,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&wifi {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wf_2g_5g_pins>;
|
||||
};
|
||||
|
||||
&pio {
|
||||
mmc0_pins_default: mmc0-pins {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc_51";
|
||||
};
|
||||
conf-cmd-dat {
|
||||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
|
||||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
|
||||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
|
||||
input-enable;
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
conf-clk {
|
||||
pins = "EMMC_CK";
|
||||
drive-strength = <6>;
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-ds {
|
||||
pins = "EMMC_DSL";
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-rst {
|
||||
pins = "EMMC_RSTB";
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_uhs: mmc0-uhs-pins {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc_51";
|
||||
};
|
||||
conf-cmd-dat {
|
||||
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
|
||||
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
|
||||
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
|
||||
input-enable;
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
conf-clk {
|
||||
pins = "EMMC_CK";
|
||||
drive-strength = <6>;
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-ds {
|
||||
pins = "EMMC_DSL";
|
||||
mediatek,pull-down-adv = <2>; /* pull-down 50K */
|
||||
};
|
||||
conf-rst {
|
||||
pins = "EMMC_RSTB";
|
||||
drive-strength = <4>;
|
||||
mediatek,pull-up-adv = <1>; /* pull-up 10K */
|
||||
};
|
||||
};
|
||||
|
||||
pcie_pins: pcie-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_clk", "pcie_pereset";
|
||||
};
|
||||
};
|
||||
|
||||
button_pins: button-pins {
|
||||
pins = "GPIO_12";
|
||||
mediatek,pull-down-adv = <0>; /* bias-disable */
|
||||
};
|
||||
|
||||
uart1_pins: uart1-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart1_2_rx_tx", "uart1_2_cts_rts";
|
||||
};
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0-pins {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_pins: pwm-pins {
|
||||
mux {
|
||||
function = "pwm";
|
||||
groups = "pwm0", "pwm1_0";
|
||||
};
|
||||
};
|
||||
|
||||
wf_2g_5g_pins: wf-2g-5g-pins {
|
||||
mux {
|
||||
function = "wifi";
|
||||
groups = "wf_2g", "wf_5g";
|
||||
};
|
||||
conf {
|
||||
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
|
||||
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
|
||||
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
|
||||
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
|
||||
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
|
||||
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
|
||||
"WF1_TOP_CLK", "WF1_TOP_DATA";
|
||||
drive-strength = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
mux_sel: mux-sel-hog {
|
||||
gpio-hog;
|
||||
gpios = <23 GPIO_ACTIVE_LOW>;
|
||||
line-name = "mux-sel";
|
||||
output-high;
|
||||
};
|
||||
|
||||
mux_oe: mux-oe-hog {
|
||||
gpio-hog;
|
||||
gpios = <24 GPIO_ACTIVE_LOW>;
|
||||
line-name = "mux-oe";
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&trng {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
|
||||
/* DA14531MOD Bluetooth */
|
||||
bluetooth {
|
||||
compatible = "renesas,DA14531";
|
||||
reset-gpios = <&pio 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
system-leds {
|
||||
compatible = "srg,sysled";
|
||||
reg = <0x30>;
|
||||
|
||||
led_status_red: led@1 {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
led_status_green: led@2 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
led_status_blue: led@3 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
led_status_white: led@4 {
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
reg = <4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -62,6 +62,10 @@ mediatek_setup_interfaces()
|
||||
zyxel,nwa50ax-pro)
|
||||
ucidef_set_interface_lan "eth0"
|
||||
;;
|
||||
smartrg,sdg-8622|\
|
||||
smartrg,sdg-8632)
|
||||
ucidef_set_interfaces_lan_wan lan wan
|
||||
;;
|
||||
tplink,tl-xdr6086)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2" eth1
|
||||
;;
|
||||
@ -142,6 +146,14 @@ mediatek_setup_macs()
|
||||
wan_mac=$(macaddr_add "$lan_mac" 1)
|
||||
label_mac=$wan_mac
|
||||
;;
|
||||
smartrg,sdg-8612|\
|
||||
smartrg,sdg-8614|\
|
||||
smartrg,sdg-8622|\
|
||||
smartrg,sdg-8632)
|
||||
label_mac=$(mmc_get_mac_ascii mfginfo MFG_MAC)
|
||||
wan_mac=$label_mac
|
||||
lan_mac=$(macaddr_add "$label_mac" 1)
|
||||
;;
|
||||
xiaomi,mi-router-wr30u-112m-nmbm|\
|
||||
xiaomi,mi-router-wr30u-stock|\
|
||||
xiaomi,mi-router-wr30u-ubootmod|\
|
||||
|
||||
@ -7,10 +7,18 @@
|
||||
board=$(board_name)
|
||||
|
||||
case "$FIRMWARE" in
|
||||
"mediatek/mt7915_eeprom.bin")
|
||||
case "$board" in
|
||||
smartrg,sdg-8622)
|
||||
caldata_extract_mmc "factory" 0xa0000 0x1000
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"mediatek/mt7916_eeprom.bin")
|
||||
case "$board" in
|
||||
acer,predator-w6)
|
||||
caldata_extract_mmc "factory" 0xA0000 0x1000
|
||||
acer,predator-w6|\
|
||||
smartrg,sdg-8632)
|
||||
caldata_extract_mmc "factory" 0xa0000 0x1000
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
@ -34,6 +42,12 @@ case "$FIRMWARE" in
|
||||
ln -sf /tmp/tp_data/MT7986_EEPROM.bin \
|
||||
/lib/firmware/$FIRMWARE
|
||||
;;
|
||||
smartrg,sdg-8612|\
|
||||
smartrg,sdg-8614|\
|
||||
smartrg,sdg-8622|\
|
||||
smartrg,sdg-8632)
|
||||
caldata_extract_mmc "factory" 0x0 0x1000
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
"mediatek/mt7986_eeprom_mt7976.bin")
|
||||
|
||||
@ -85,6 +85,15 @@ case "$board" in
|
||||
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
|
||||
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
|
||||
;;
|
||||
smartrg,sdg-8612|\
|
||||
smartrg,sdg-8614|\
|
||||
smartrg,sdg-8622|\
|
||||
smartrg,sdg-8632)
|
||||
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
|
||||
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
|
||||
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
|
||||
[ "$PHYNBR" = "2" ] && macaddr_add $addr 4 > /sys${DEVPATH}/macaddress
|
||||
;;
|
||||
tplink,tl-xdr4288|\
|
||||
tplink,tl-xdr6086|\
|
||||
tplink,tl-xdr6088)
|
||||
|
||||
@ -21,6 +21,23 @@ preinit_set_mac_address() {
|
||||
addr=$(get_mac_binary "/tmp/tp_data/default-mac" 0)
|
||||
ip link set dev eth1 address "$(macaddr_add $addr 1)"
|
||||
;;
|
||||
smartrg,sdg-8612|\
|
||||
smartrg,sdg-8614)
|
||||
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
|
||||
lan_addr=$(macaddr_add $addr 1)
|
||||
ip link set dev wan address "$addr"
|
||||
ip link set dev eth0 address "$lan_addr"
|
||||
ip link set dev lan1 address "$lan_addr"
|
||||
ip link set dev lan2 address "$lan_addr"
|
||||
ip link set dev lan3 address "$lan_addr"
|
||||
ip link set dev lan4 address "$lan_addr"
|
||||
;;
|
||||
smartrg,sdg-8622|\
|
||||
smartrg,sdg-8632)
|
||||
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
|
||||
ip link set dev wan address "$addr"
|
||||
ip link set dev lan address "$(macaddr_add $addr 1)"
|
||||
;;
|
||||
*)
|
||||
;;
|
||||
esac
|
||||
|
||||
@ -51,7 +51,11 @@ platform_do_upgrade() {
|
||||
local board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
acer,predator-w6)
|
||||
acer,predator-w6|\
|
||||
smartrg,sdg-8612|\
|
||||
smartrg,sdg-8614|\
|
||||
smartrg,sdg-8622|\
|
||||
smartrg,sdg-8632)
|
||||
CI_KERNPART="kernel"
|
||||
CI_ROOTPART="rootfs"
|
||||
emmc_do_upgrade "$1"
|
||||
|
||||
@ -137,6 +137,44 @@ define Device/acer_predator-w6
|
||||
endef
|
||||
TARGET_DEVICES += acer_predator-w6
|
||||
|
||||
define Device/adtran_smartrg
|
||||
DEVICE_VENDOR := Adtran
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
DEVICE_PACKAGES := e2fsprogs f2fsck mkf2fs kmod-hwmon-pwmfan \
|
||||
kmod-mt7986-firmware mt7986-wo-firmware
|
||||
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
|
||||
endef
|
||||
|
||||
define Device/smartrg_sdg-8612
|
||||
$(call Device/adtran_smartrg)
|
||||
DEVICE_MODEL := SDG-8612
|
||||
DEVICE_DTS := mt7986a-smartrg-SDG-8612
|
||||
endef
|
||||
TARGET_DEVICES += smartrg_sdg-8612
|
||||
|
||||
define Device/smartrg_sdg-8614
|
||||
$(call Device/adtran_smartrg)
|
||||
DEVICE_MODEL := SDG-8614
|
||||
DEVICE_DTS := mt7986a-smartrg-SDG-8614
|
||||
endef
|
||||
TARGET_DEVICES += smartrg_sdg-8614
|
||||
|
||||
define Device/smartrg_sdg-8622
|
||||
$(call Device/adtran_smartrg)
|
||||
DEVICE_MODEL := SDG-8622
|
||||
DEVICE_DTS := mt7986a-smartrg-SDG-8622
|
||||
DEVICE_PACKAGES += kmod-mt7915-firmware
|
||||
endef
|
||||
TARGET_DEVICES += smartrg_sdg-8622
|
||||
|
||||
define Device/smartrg_sdg-8632
|
||||
$(call Device/adtran_smartrg)
|
||||
DEVICE_MODEL := SDG-8632
|
||||
DEVICE_DTS := mt7986a-smartrg-SDG-8632
|
||||
DEVICE_PACKAGES += kmod-mt7915-firmware
|
||||
endef
|
||||
TARGET_DEVICES += smartrg_sdg-8632
|
||||
|
||||
define Device/asus_tuf-ax4200
|
||||
DEVICE_VENDOR := ASUS
|
||||
DEVICE_MODEL := TUF-AX4200
|
||||
|
||||
Loading…
Reference in New Issue
Block a user