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mediatek: replace mt7986 watchdog assert patch with upstream
Replace "920-watchdog-add-mt7986-assert.patch" with upstreamed - 920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch - 921-v5.19-watchdog-mtk_wdt-mt7986-Add-toprgu-reset-controller.patch Signed-off-by: Nick Hainke <vincent@systemli.org>
This commit is contained in:
Nick Hainke
Daniel Golle
parent
61a9367b86
commit
29d987fc89
50
target/linux/mediatek/patches-5.15/920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch
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50
target/linux/mediatek/patches-5.15/920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch
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@ -0,0 +1,50 @@
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From 59b0f51335644ee603260faaa4298c0115fb7187 Mon Sep 17 00:00:00 2001
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From: Fengquan Chen <Fengquan.Chen@mediatek.com>
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Date: Tue, 14 Sep 2021 20:34:54 +0800
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Subject: [PATCH] watchdog: mtk: add disable_wdt_extrst support
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In some cases, we may need watchdog just to trigger an
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internal soc reset without sending any output signal.
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Provide a disable_wdt_extrst parameter for configuration.
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We can disable or enable it just by configuring dts.
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Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com>
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Reviewed-by: Guenter Roeck <linux@roeck-us.net>
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Link: https://lore.kernel.org/r/20210914123454.32603-3-Fengquan.Chen@mediatek.com
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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---
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drivers/watchdog/mtk_wdt.c | 7 +++++++
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1 file changed, 7 insertions(+)
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--- a/drivers/watchdog/mtk_wdt.c
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+++ b/drivers/watchdog/mtk_wdt.c
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@@ -65,6 +65,7 @@ struct mtk_wdt_dev {
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void __iomem *wdt_base;
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spinlock_t lock; /* protects WDT_SWSYSRST reg */
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struct reset_controller_dev rcdev;
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+ bool disable_wdt_extrst;
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};
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struct mtk_wdt_data {
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@@ -256,6 +257,8 @@ static int mtk_wdt_start(struct watchdog
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reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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else
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reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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+ if (mtk_wdt->disable_wdt_extrst)
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+ reg &= ~WDT_MODE_EXRST_EN;
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reg |= (WDT_MODE_EN | WDT_MODE_KEY);
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iowrite32(reg, wdt_base + WDT_MODE);
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@@ -381,6 +384,10 @@ static int mtk_wdt_probe(struct platform
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if (err)
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return err;
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}
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+
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+ mtk_wdt->disable_wdt_extrst =
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+ of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
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+
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return 0;
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}
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@ -1,57 +0,0 @@
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--- a/drivers/watchdog/mtk_wdt.c
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+++ b/drivers/watchdog/mtk_wdt.c
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@@ -9,6 +9,7 @@
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* Based on sunxi_wdt.c
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*/
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+#include <dt-bindings/reset/mt7986-resets.h>
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#include <dt-bindings/reset-controller/mt2712-resets.h>
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#include <dt-bindings/reset-controller/mt8183-resets.h>
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#include <dt-bindings/reset-controller/mt8192-resets.h>
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@@ -65,6 +66,7 @@ struct mtk_wdt_dev {
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void __iomem *wdt_base;
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spinlock_t lock; /* protects WDT_SWSYSRST reg */
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struct reset_controller_dev rcdev;
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+ bool disable_wdt_extrst;
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};
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struct mtk_wdt_data {
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@@ -87,6 +89,10 @@ static const struct mtk_wdt_data mt8195_
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.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
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};
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+static const struct mtk_wdt_data mt7986_data = {
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+ .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
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+};
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+
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static int toprgu_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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@@ -256,6 +262,8 @@ static int mtk_wdt_start(struct watchdog
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reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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else
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reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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+ if (mtk_wdt->disable_wdt_extrst)
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+ reg &= ~WDT_MODE_EXRST_EN;
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reg |= (WDT_MODE_EN | WDT_MODE_KEY);
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iowrite32(reg, wdt_base + WDT_MODE);
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@@ -381,6 +389,10 @@ static int mtk_wdt_probe(struct platform
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if (err)
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return err;
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}
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+
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+ mtk_wdt->disable_wdt_extrst =
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+ of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
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+
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return 0;
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}
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@@ -414,6 +426,7 @@ static const struct of_device_id mtk_wdt
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{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
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{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
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{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
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+ { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
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49
target/linux/mediatek/patches-5.15/921-v5.19-watchdog-mtk_wdt-mt7986-Add-toprgu-reset-controller.patch
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49
target/linux/mediatek/patches-5.15/921-v5.19-watchdog-mtk_wdt-mt7986-Add-toprgu-reset-controller.patch
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@ -0,0 +1,49 @@
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From 711a5b25bac95dcd1111521ed71693330e74a926 Mon Sep 17 00:00:00 2001
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From: Sam Shih <sam.shih@mediatek.com>
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Date: Wed, 5 Jan 2022 18:04:56 +0800
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Subject: [PATCH] watchdog: mtk_wdt: mt7986: Add toprgu reset controller
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support
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Besides watchdog, the mt7986 toprgu module also provides software reset
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functionality for various peripheral subsystems
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(eg, ethernet, pcie, and connectivity)
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Signed-off-by: Sam Shih <sam.shih@mediatek.com>
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Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
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Reviewed-by: Guenter Roeck <linux@roeck-us.net>
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Link: https://lore.kernel.org/r/20220105100456.7126-3-sam.shih@mediatek.com
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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---
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drivers/watchdog/mtk_wdt.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/watchdog/mtk_wdt.c
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+++ b/drivers/watchdog/mtk_wdt.c
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@@ -10,6 +10,7 @@
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*/
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#include <dt-bindings/reset-controller/mt2712-resets.h>
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+#include <dt-bindings/reset/mt7986-resets.h>
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#include <dt-bindings/reset-controller/mt8183-resets.h>
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#include <dt-bindings/reset-controller/mt8192-resets.h>
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#include <dt-bindings/reset/mt8195-resets.h>
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@@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_
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.toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM,
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};
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+static const struct mtk_wdt_data mt7986_data = {
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+ .toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
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+};
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+
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static const struct mtk_wdt_data mt8183_data = {
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.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
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};
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@@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device
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static const struct of_device_id mtk_wdt_dt_ids[] = {
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{ .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
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{ .compatible = "mediatek,mt6589-wdt" },
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+ { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
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{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
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{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
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{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
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