kreyren/guix-kreyren
1
0
Fork 0
Code Issues 1 Pull Requests 1 Releases Activity
007f6d9885
guix-kreyren/gnu/packages/fpga.scm
Theodoros Foradis d109b1e85c
Update e-mail for Theodoros Foradis. 
* .mailmap: Add entry.
* gnu/packages/aspell.scm: Replace theodoros.for@openmailbox.org with current address.
* gnu/packages/compression.scm: Likewise.
* gnu/packages/electronics.scm: Likewise.
* gnu/packages/engineering.scm: Likewise.
* gnu/packages/fpga.scm: Likewise.
* gnu/packages/graphviz.scm: Likewise.
* gnu/packages/guile.scm: Likewise.
* gnu/packages/libusb.scm: Likewise.
* gnu/packages/maths.scm: Likewise.
* gnu/packages/messaging.scm: Likewise.
* gnu/packages/uml.scm: Likewise.
* gnu/packages/wxwidgets.scm: Likewise.

Signed-off-by: Ludovic Courtès <ludo@gnu.org>
2017-10-03 17:07:54 +02:00

332 lines
13 KiB
Scheme
Raw Blame History

;;; GNU Guix --- Functional package management for GNU
;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
;;;
;;; This file is part of GNU Guix.
;;;
;;; GNU Guix is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU General Public License as published by
;;; the Free Software Foundation; either version 3 of the License, or (at
;;; your option) any later version.
;;;
;;; GNU Guix is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of
;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;;; GNU General Public License for more details.
;;;
;;; You should have received a copy of the GNU General Public License
;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>.
(define-module (gnu packages fpga)
#:use-module ((guix licenses) #:prefix license:)
#:use-module (guix packages)
#:use-module (guix download)
#:use-module (guix git-download)
#:use-module (guix build-system gnu)
#:use-module (guix build-system cmake)
#:use-module (gnu packages)
#:use-module (gnu packages compression)
#:use-module (gnu packages pkg-config)
#:use-module (gnu packages tcl)
#:use-module (gnu packages readline)
#:use-module (gnu packages python)
#:use-module (gnu packages bison)
#:use-module (gnu packages flex)
#:use-module (gnu packages gtk)
#:use-module (gnu packages graphviz)
#:use-module (gnu packages libffi)
#:use-module (gnu packages linux)
#:use-module (gnu packages maths)
#:use-module (gnu packages perl)
#:use-module (gnu packages ghostscript)
#:use-module (gnu packages gperf)
#:use-module (gnu packages gawk)
#:use-module (gnu packages version-control)
#:use-module (gnu packages libftdi))
(define-public abc
(let ((commit "5ae4b975c49c")
(revision "1"))
(package
(name "abc")
(version (string-append "0.0-" revision "-" (string-take commit 9)))
(source (origin
(method url-fetch)
(uri
(string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
(file-name (string-append name "-" version "-checkout.zip"))
(sha256
(base32
"1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
(build-system gnu-build-system)
(native-inputs
`(("unzip" ,unzip)))
(inputs
`(("readline" ,readline)))
(arguments
`(#:tests? #f ; no check target
#:phases
(modify-phases %standard-phases
(delete 'configure)
(replace 'install
(lambda* (#:key outputs #:allow-other-keys)
(let* ((out (assoc-ref outputs "out"))
(out-bin (string-append out "/bin")))
(install-file "abc" out-bin)))))))
(home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
(synopsis "Sequential logic synthesis and formal verification")
(description "ABC is a program for sequential logic synthesis and
formal verification.")
(license
(license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))
(define-public iverilog
(package
(name "iverilog")
(version "10.1.1")
(source (origin
(method url-fetch)
(uri
(string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
"verilog-" version ".tar.gz"))
(sha256
(base32
"1nnassxvq30rnn0r2p85rkb2zwxk97p109y13x3vr365wzgpbapx"))))
(build-system gnu-build-system)
(native-inputs
`(("flex" ,flex)
("bison" ,bison)
("ghostscript" ,ghostscript))) ; ps2pdf
(home-page "http://iverilog.icarus.com/")
(synopsis "FPGA Verilog simulation and synthesis tool")
(description "Icarus Verilog is a Verilog simulation and synthesis tool.
It operates as a compiler, compiling source code written in Verilog
(IEEE-1364) into some target format.
For batch simulation, the compiler can generate an intermediate form
called vvp assembly.
This intermediate form is executed by the ``vvp'' command.
For synthesis, the compiler generates netlists in the desired format.")
;; GPL2 only because of:
;; - ./driver/iverilog.man.in
;; - ./iverilog-vpi.man.in
;; - ./tgt-fpga/iverilog-fpga.man
;; - ./vvp/vvp.man.in
;; Otherwise would be GPL2+.
;; You have to accept both GPL2 and LGPL2.1+.
(license (list license:gpl2 license:lgpl2.1+))))
(define-public yosys
(package
(name "yosys")
(version "0.7")
(source (origin
(method url-fetch)
(uri
(string-append "https://github.com/cliffordwolf/yosys/archive/"
name "-" version ".tar.gz"))
(sha256
(base32
"0vkfdn4phvkjqlnpqlr6q5f97bgjc3312vj5jf0vf85zqv88dy9x"))
(file-name (string-append name "-" version "-checkout.tar.gz"))
(modules '((guix build utils)))
(snippet
'(substitute* "Makefile"
(("ABCREV = .*") "ABCREV = default\n")))))
(build-system gnu-build-system)
(arguments
`(#:test-target "test"
#:make-flags (list "CC=gcc"
"CXX=g++"
(string-append "PREFIX=" %output))
#:phases
(modify-phases %standard-phases
(add-before 'configure 'fix-paths
(lambda _
(substitute* "./passes/cmds/show.cc"
(("exec xdot") (string-append "exec " (which "xdot")))
(("dot -") (string-append (which "dot") " -"))
(("fuser") (which "fuser")))
#t))
(replace 'configure
(lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
(zero? (apply system* "make" "config-gcc" make-flags))))
(add-after 'configure 'prepare-abc
(lambda* (#:key inputs #:allow-other-keys)
(let* ((sourceabc (assoc-ref inputs "abc"))
(sourcebin (string-append sourceabc "/bin"))
(source (string-append sourcebin "/abc")))
(mkdir-p "abc")
(call-with-output-file "abc/Makefile"
(lambda (port)
(format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
(copy-file source "abc/abc")
(zero? (system* "chmod" "+w" "abc/abc")))))
(add-before 'check 'fix-iverilog-references
(lambda* (#:key inputs native-inputs #:allow-other-keys)
(let* ((xinputs (or native-inputs inputs))
(xdirname (assoc-ref xinputs "iverilog"))
(iverilog (string-append xdirname "/bin/iverilog")))
(substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
"./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
"./techlibs/ice40/tests/test_bram.sh"
"./techlibs/ice40/tests/test_ffs.sh"
"./techlibs/xilinx/tests/bram1.sh"
"./techlibs/xilinx/tests/bram2.sh"
"./tests/bram/run-single.sh"
"./tests/realmath/run-test.sh"
"./tests/simple/run-test.sh"
"./tests/techmap/mem_simple_4x1_runtest.sh"
"./tests/tools/autotest.sh"
"./tests/vloghtb/common.sh")
(("if ! which iverilog") "if ! true")
(("iverilog ") (string-append iverilog " "))
(("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
iverilog "\"")))
#t))))))
(native-inputs
`(("pkg-config" ,pkg-config)
("python" ,python)
("bison" ,bison)
("flex" ,flex)
("gawk" , gawk) ; for the tests and "make" progress pretty-printing
("tcl" ,tcl) ; tclsh for the tests
("iverilog" ,iverilog))) ; for the tests
(inputs
`(("tcl" ,tcl)
("readline" ,readline)
("libffi" ,libffi)
("graphviz" ,graphviz)
("psmisc" ,psmisc)
("xdot" ,xdot)
("abc" ,abc)))
(propagated-inputs
`(("z3" ,z3))) ; should be in path for yosys-smtbmc
(home-page "http://www.clifford.at/yosys/")
(synopsis "FPGA Verilog RTL synthesizer")
(description "Yosys synthesizes Verilog-2005.")
(license license:isc)))
(define-public icestorm
(let ((commit "12b2295c9087d94b75e374bb205ae4d76cf17e2f")
(revision "1"))
(package
(name "icestorm")
(version (string-append "0.0-" revision "-" (string-take commit 9)))
(source (origin
(method git-fetch)
(uri (git-reference
(url "https://github.com/cliffordwolf/icestorm.git")
(commit commit)))
(file-name (string-append name "-" version "-checkout"))
(sha256
(base32
"1mmzlqvap6w8n4qzv3idvy51arkgn03692ssplwncy3akjrbsd2b"))))
(build-system gnu-build-system)
(arguments
`(#:tests? #f ; no unit tests that don't need an FPGA exist.
#:make-flags (list "CC=gcc" "CXX=g++"
(string-append "PREFIX=" (assoc-ref %outputs "out")))
#:phases
(modify-phases %standard-phases
(add-after 'unpack 'remove-usr-local
(lambda _
(substitute* "iceprog/Makefile"
(("-I/usr/local/include") "")
(("-L/usr/local/lib") ""))
#t))
(add-after 'remove-usr-local 'fix-usr-local
(lambda* (#:key outputs #:allow-other-keys)
(substitute* "icebox/icebox_vlog.py"
(("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
#t))
(delete 'configure))))
(inputs
`(("libftdi" ,libftdi)))
(native-inputs
`(("python-3" ,python)
("pkg-config" ,pkg-config)))
(home-page "http://www.clifford.at/icestorm/")
(synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
(description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
Includes the actual FTDI connector.")
(license license:isc))))
(define-public arachne-pnr
(let ((commit "52e69ed207342710080d85c7c639480e74a021d7")
(revision "1"))
(package
(name "arachne-pnr")
(version (string-append "0.0-" revision "-" (string-take commit 9)))
(source (origin
(method git-fetch)
(uri (git-reference
(url "https://github.com/cseed/arachne-pnr.git")
(commit commit)))
(file-name (string-append name "-" version "-checkout"))
(sha256
(base32
"15bdw5yxj76lxrwksp6liwmr6l1x77isf4bs50ys9rsnmiwh8c3w"))))
(build-system gnu-build-system)
(arguments
`(#:test-target "test"
#:phases (modify-phases %standard-phases
(replace 'configure
(lambda* (#:key outputs inputs #:allow-other-keys)
(substitute* '("Makefile")
(("DESTDIR = .*") (string-append "DESTDIR = "
(assoc-ref outputs "out")
"\n"))
(("ICEBOX = .*") (string-append "ICEBOX = "
(assoc-ref inputs "icestorm")
"/share/icebox\n")))
(substitute* '("./tests/fsm/generate.py"
"./tests/combinatorial/generate.py")
(("#!/usr/bin/python") "#!/usr/bin/python2"))
#t)))))
(inputs
`(("icestorm" ,icestorm)))
(native-inputs
`(("git" ,git) ; for determining its own version string
("yosys" ,yosys) ; for tests
("perl" ,perl) ; for shasum
("python-2" ,python-2))) ; for tests
(home-page "https://github.com/cseed/arachne-pnr")
(synopsis "Place-and-Route tool for FPGAs")
(description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
(license license:gpl2))))
(define-public gtkwave
(package
(name "gtkwave")
(version "3.3.76")
(source (origin
(method url-fetch)
(uri (string-append "http://gtkwave.sourceforge.net/"
name "-" version ".tar.gz"))
(sha256
(base32
"1vlvavszb1jwwiixiagld88agjrjg0ix8qa4xnxj4ziw0q87jbmn"))))
(build-system gnu-build-system)
(native-inputs
`(("gperf" ,gperf)
("pkg-config" ,pkg-config)))
(inputs
`(("tcl" ,tcl)
("tk" ,tk)
("gtk+-2" ,gtk+-2)))
(arguments
`(#:configure-flags
(list (string-append "--with-tcl="
(assoc-ref %build-inputs "tcl")
"/lib")
(string-append "--with-tk="
(assoc-ref %build-inputs "tk")
"/lib"))))
(synopsis "Waveform viewer for FPGA simulator trace files")
(description "This package is a waveform viewer for FPGA
simulator trace files (FST).")
(home-page "http://gtkwave.sourceforge.net/")
;; Exception against free government use in tcl_np.c and tcl_np.h
(license (list license:gpl2+ license:expat license:tcl/tk))))
Reference in New Issue View Git Blame Copy Permalink