147 lines
4.1 KiB
C
Executable File
147 lines
4.1 KiB
C
Executable File
#ifndef __MACH_SUNXI_CLK__H
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#define __MACH_SUNXI_CLK__H
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#include "asm/io.h"
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#include <common.h>
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#include <malloc.h>
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#include <asm/arch/timer.h>
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#include <asm/arch/platform.h>
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#include <linux/list.h>
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#define BIT0 0x0001
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#define BIT1 0x0002
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#define BIT2 0x0004
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#define BIT3 0x0008
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#define BIT4 0x0010
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#define BIT5 0x0020
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#define BIT6 0x0040
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#define BIT7 0x0080
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#define BIT8 0x0100
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#define BIT9 0x0200
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#define BIT10 0x0400
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#define BIT11 0x0800
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#define BIT12 0x1000
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#define BIT13 0x2000
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#define BIT14 0x4000
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#define BIT15 0x8000
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#define BIT16 0x00010000
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#define BIT17 0x00020000
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#define BIT18 0x00040000
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#define BIT19 0x00080000
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#define BIT20 0x00100000
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#define BIT21 0x00200000
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#define BIT22 0x00400000
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#define BIT23 0x00800000
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#define BIT24 0x01000000
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#define BIT25 0x02000000
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#define BIT26 0x04000000
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#define BIT27 0x08000000
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#define BIT28 0x10000000
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#define BIT29 0x20000000
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#define BIT30 0x40000000
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#define BIT31 0x80000000
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#define CLK_SET_RATE_GATE BIT0 /* must be gated across rate change */
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#define CLK_SET_PARENT_GATE BIT1 /* must be gated across re-parent */
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#define CLK_SET_RATE_PARENT BIT2 /* propagate rate change up one level */
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#define CLK_IGNORE_UNUSED BIT3 /* do not gate even if unused */
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#define CLK_IS_ROOT BIT4 /* root clk, has no parent */
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#define CLK_IS_BASIC BIT5 /* Basic clk, can't do a to_clk_foo() */
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#define CLK_GET_RATE_NOCACHE BIT6 /* do not use the cached clk rate */
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#define CLK_IGNORE_AUTORESET BIT7 /* for sunxi use */
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#define CLK_REVERT_ENABLE BIT8 /* for sunxi use */
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#define CLK_IGNORE_SYNCBOOT BIT9 /* for sunxi use */
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#define CLK_READONLY BIT10 /* for sunxi use */
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#define CLK_IGNORE_DISABLE BIT11 /* for sunxi use */
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#define CLK_RATE_FLAT_FACTORS BIT12 /* for sunxi use */
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#define CLK_RATE_FLAT_DELAY BIT13 /* for sunxi use */
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#define mdelay(ms) __msdelay(ms)
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#define udelay(us) __usdelay(us)
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#define to_clk_factor(_hw) container_of(_hw, struct sunxi_clk_factors, hw)
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#define SETMASK(width, shift) ((width?((-1U) >> (32-width)):0) << (shift))
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#define CLRMASK(width, shift) (~(SETMASK(width, shift)))
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#define GET_BITS(shift, width, reg) \
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(((reg) & SETMASK(width, shift)) >> (shift))
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#define SET_BITS(shift, width, reg, val) \
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(((reg) & CLRMASK(width, shift)) | (val << (shift)))
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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struct clk {
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const char *name;
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const struct clk_ops *ops;
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struct clk_hw *hw;
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struct clk *parent;
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const char **parent_names;
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struct clk **parents;
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u8 num_parents;
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unsigned long rate;
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unsigned long new_rate;
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unsigned long flags;
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unsigned int enable_count;
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unsigned int prepare_count;
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struct hlist_head children;
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struct hlist_node child_node;
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unsigned int notifier_count;
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#ifdef CONFIG_COMMON_CLK_DEBUG
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struct dentry *dentry;
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#endif
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};
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struct clk_hw {
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struct clk *clk;
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const struct clk_init_data *init;
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};
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struct clk_ops {
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int (*prepare)(struct clk_hw *hw);
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void (*unprepare)(struct clk_hw *hw);
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int (*enable)(struct clk_hw *hw);
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void (*disable)(struct clk_hw *hw);
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int (*is_enabled)(struct clk_hw *hw);
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unsigned long (*recalc_rate)(struct clk_hw *hw,
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unsigned long parent_rate);
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long (*round_rate)(struct clk_hw *hw, unsigned long,
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unsigned long *);
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int (*set_parent)(struct clk_hw *hw, u8 index);
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u8 (*get_parent)(struct clk_hw *hw);
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int (*set_rate)(struct clk_hw *hw, unsigned long,
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unsigned long);
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void (*init)(struct clk_hw *hw);
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};
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struct clk_init_data {
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const char *name;
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const struct clk_ops *ops;
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const char **parent_names;
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u8 num_parents;
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unsigned long flags;
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};
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struct clk_fixed_rate {
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struct clk_hw hw;
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unsigned long fixed_rate;
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u8 flags;
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};
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struct clk *clk_register_fixed_rate(void *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned long fixed_rate);
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struct sunxi_reg_ops {
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u32 (*reg_readl)(void __iomem * reg);
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void (*reg_writel)(u32 val,void __iomem * reg);
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};
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void init_clocks(void);
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#endif
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