94 lines
2.1 KiB
C
94 lines
2.1 KiB
C
/*
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* sound\soc\sunxi\sunxi_dsd.h
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* (C) Copyright 2010-2016
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* Reuuimlla Technology Co., Ltd. <www.allwinnertech.com>
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* huangxin <huangxin@allwinnertech.com>
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*
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* some simple description for this code
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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*/
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#ifndef SUNXI_DSD_H_
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#define SUNXI_DSD_H_
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#include "sunxi_dma.h"
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/*------------------DSD register definition--------------------*/
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#define DSD_EN_CTRL 0x00
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#define DSD_SR_CTRL 0x04
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#define DSD_TX_CONF 0x08
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#define DSD_TX_FIFO_CTRL 0x14
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#define DSD_TX_FIFO_STA 0x18
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#define DSD_INT_CTRL 0x1c
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#define DSD_TX_DATA 0x20
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#define DSD_INT_STA 0x24
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#define DSD_TX_CNT 0x28
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#define DSD_TX_MAP 0x2c
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/*DSD_EN_CTRL:0x00*/
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#define TX_EN 1
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#define GLOBAL_EN 0
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/*DSD_SR_CTRL:0x04*/
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#define DSD_SAMPLE_RATE 0//pclk
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/*DSD_TX_CONF:0x08*/
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#define PCLK_SOURCE_SELECT 20
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#define DSD_TX_CHAN_NUM 16
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#define DSD_TX_CHAN_EN 8
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#define MSB_LSB_FIR_SEL 5
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#define DSD_TX_DRIVER_MODE 4
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#define DSD_TX_DATA_WIDTH 1
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#define DSD_TX_MODE_SELECT 0
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/*DSD_TX_FIFO_CTRL:0x14*/
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#define TX_FIFO_FLUSH 31
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#define TX_FIFO_TRIG_LEVEL 8
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#define TXIM 0
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/*DSD_TX_FIFO_STA:0x18*/
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#define TX_FIFO_FULL 9
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#define TX_FIFO_EMPTY 8
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#define TX_FIFO_DATA_COUNTER 0
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/*DSD_INT_CTRL:0x1c*/
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#define TX_FIFO_DRQ_EN 3
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#define TX_FIFO_EMPYT_IRQ_EN 2
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#define TX_FIFO_UNDERRUN_IRQ_EN 0
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/*DSD_TX_DATA:0x20*/
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#define TX_DATA 0
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/*DSD_INT_STA:0x24*/
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#define TXE_INT 2
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#define TXO_INT 1
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#define TXU_INT 0
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/*DSD_TX_CNT:0x28*/
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#define TX_CNT 0
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/*DSD_TX_MAP:0x2c*/
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#define TX_CHAN1_MAP 4
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#define TX_CHAN0_MAP 0
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#define DSD_CHANMAP_DEFAULT (0x10)
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struct sunxi_dsd_info {
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void __iomem *regs; /* dsd base */
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struct clk *pllclk;
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struct clk *moduleclk;
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struct snd_soc_dai_driver dai;
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struct sunxi_dma_params play_dma_param;
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struct pinctrl *pinctrl;
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struct pinctrl_state *pinstate;
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struct pinctrl_state *pinstate_sleep;
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u32 clk_enable_cnt;
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u32 mode_select;
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};
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#endif
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