144 lines
4.8 KiB
C
144 lines
4.8 KiB
C
/*******************************************************************************
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* Copyright © 2012-2014, Shuge
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* Author: Sugar <shugeLinux@gmail.com>
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*
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* This file is provided under a dual BSD/GPL license. When using or
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* redistributing this file, you may do so under either license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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********************************************************************************/
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#ifndef __SUNXI_GETH_H__
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#define __SUNXI_GETH_H__
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#include <linux/etherdevice.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <mach/sys_config.h>
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#if defined(CONFIG_ARCH_SUN8I)
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#define GETH_BASE 0x01c30000
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#elif defined(CONFIG_ARCH_SUN9I)
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#define GETH_BASE 0x00830000
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#endif
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/******************************************************************************
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*
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* the system register for geth.
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*
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*****************************************************************************/
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#if defined(CONFIG_ARCH_SUN8I)
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#define GPIO_BASE 0x01C20800
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#elif defined(CONFIG_ARCH_SUN9I)
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#define GPIO_BASE 0x06000800
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#endif
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#define PA_CFG0 (0x00)
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#define PA_CFG1 (0x04)
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#define PA_CFG2 (0x08)
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#define PA_CFG3 (0x0C)
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/* Clk control */
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#if defined(CONFIG_ARCH_SUN8I)
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#define CCMU_BASE 0x01c20000
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#define AHB1_GATING (0x60)
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#define AHB1_MOD_RESET (0x2c0)
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#if defined(CONFIG_ARCH_SUN8IW1)
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#define SYS_CTL_BASE CCMU_BASE
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#define GETH_CLK_REG 0x00D0
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#define GETH_CLK_GPIT 0x00000004
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#else
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#define SYS_CTL_BASE 0x01c00000
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#define GETH_CLK_REG 0x0030
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#define GETH_CLK_GPIT 0x00000004
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#endif
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#elif defined(CONFIG_ARCH_SUN9I)
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#define CCMU_BASE 0x06000400
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#define AHB1_GATING (0x0184)
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#define AHB1_MOD_RESET (0x01A4)
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#define SYS_CTL_BASE 0x00800000
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#define GETH_CLK_REG 0x0030
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#define GETH_CLK_GPIT 0x00000004
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#endif
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#define GETH_RESET_BIT 0x00020000
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#define GETH_AHB_BIT 0x00020000
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#define PLL1_CFG 0x00
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#define PLL6_CFG 0x28
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/* GETH_FRAME_FILTER register value */
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#define GETH_FRAME_FILTER_PR 0x00000001 /* Promiscuous Mode */
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#define GETH_FRAME_FILTER_HUC 0x00000002 /* Hash Unicast */
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#define GETH_FRAME_FILTER_HMC 0x00000004 /* Hash Multicast */
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#define GETH_FRAME_FILTER_DAIF 0x00000008 /* DA Inverse Filtering */
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#define GETH_FRAME_FILTER_PM 0x00000010 /* Pass all multicast */
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#define GETH_FRAME_FILTER_DBF 0x00000020 /* Disable Broadcast frames */
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#define GETH_FRAME_FILTER_SAIF 0x00000100 /* Inverse Filtering */
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#define GETH_FRAME_FILTER_SAF 0x00000200 /* Source Address Filter */
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#define GETH_FRAME_FILTER_HPF 0x00000400 /* Hash or perfect Filter */
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#define GETH_FRAME_FILTER_RA 0x80000000 /* Receive all mode */
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struct dma_desc {
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u32 desc[4];
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}__attribute__((packed,aligned(4)));
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extern int sunxi_mdio_read(void *, int, int);
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extern int sunxi_mdio_write(void *, int, int, unsigned short);
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extern int sunxi_mdio_reset(void *);
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extern void sunxi_set_link_mode(void *iobase, int duplex, int speed);
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extern void sunxi_int_disable(void *);
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extern int sunxi_int_status(void *, void *x);
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extern int sunxi_mac_init(void *, int txmode, int rxmode);
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extern void sunxi_set_umac(void *, unsigned char *, int);
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extern void sunxi_mac_enable(void *);
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extern void sunxi_mac_disable(void *);
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extern void sunxi_tx_poll(void *);
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extern void sunxi_int_enable(void *);
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extern void sunxi_start_rx(void *, unsigned long);
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extern void sunxi_start_tx(void *, unsigned long);
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extern void sunxi_stop_tx(void *);
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extern void sunxi_stop_rx(void *);
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extern void sunxi_hash_filter(void *iobase, unsigned long low, unsigned long high);
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extern void sunxi_set_filter(void *iobase, unsigned long flags);
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extern void sunxi_flow_ctrl(void *iobase, int duplex, int fc, int pause);
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extern void sunxi_mac_loopback(void *iobase, int enable);
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extern void desc_buf_set(struct dma_desc *p, unsigned long paddr, int size);
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extern void desc_set_own(struct dma_desc *p);
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extern void desc_init_chain(struct dma_desc *p, unsigned long paddr, int size);
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extern void desc_tx_close(struct dma_desc *first, struct dma_desc *end, int csum_insert);
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extern void desc_init(struct dma_desc *p);
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extern int desc_get_tx_status(struct dma_desc *desc, void *x);
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extern int desc_buf_get_len(struct dma_desc *desc);
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extern int desc_buf_get_addr(struct dma_desc *desc);
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extern int desc_get_rx_status(struct dma_desc *desc, void *x);
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extern int desc_get_own(struct dma_desc *desc);
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extern int desc_get_tx_ls(struct dma_desc *desc);
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extern int desc_rx_frame_len(struct dma_desc *desc);
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extern int sunxi_mac_reset(void *iobase, void (*mdelay)(int), int n);
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extern void sunxi_geth_register(void *iobase, int version, unsigned int div);
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#if defined(CONFIG_ARCH_SUN8IW3) \
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|| defined(CONFIG_ARCH_SUN9IW1) \
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|| defined(CONFIG_ARCH_SUN7I)
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#define HW_VERSION 0
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#else
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#define HW_VERSION 1
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#endif
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#endif
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