264 lines
8.0 KiB
C
Executable File
264 lines
8.0 KiB
C
Executable File
/*
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* drivers/arisc/interfaces/arisc_rsb.c
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*
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* Copyright (c) 2013 Allwinner.
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* 2013-07-01 Written by superm (superm@allwinnertech.com).
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "../arisc_i.h"
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#if (defined CONFIG_ARCH_SUN8IW3P1) || (defined CONFIG_ARCH_SUN8IW5P1) || (defined CONFIG_ARCH_SUN8IW6P1) || \
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(defined CONFIG_ARCH_SUN8IW7P1) || (defined CONFIG_ARCH_SUN8IW9P1) || (defined CONFIG_ARCH_SUN9IW1P1) || \
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(defined CONFIG_ARCH_SUN50IW1P1)
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/*
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* used for indicate aduio codec been initialized,
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* modules like audio & trc mabye initialize,
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* but audio codec only can be initialize once
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*/
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static int audio_codec_init = 0;
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/**
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* rsb read block data.
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* @cfg: point of arisc_rsb_block_cfg struct;
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*
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* return: result, 0 - read register successed,
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* !0 - read register failed or the len more then max len;
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*/
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int arisc_rsb_read_block_data(struct arisc_rsb_block_cfg *cfg)
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{
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int i;
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int result;
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u32 paras[22];
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if ((cfg == NULL) || (cfg->devaddr == 0) || (cfg->regaddr == NULL) || (cfg->data == NULL) || (cfg->len > RSB_TRANS_BYTE_MAX) ||
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((cfg->datatype != RSB_DATA_TYPE_BYTE) && (cfg->datatype != RSB_DATA_TYPE_HWORD) && (cfg->datatype != RSB_DATA_TYPE_WORD)) ||
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((cfg->msgattr != ARISC_MESSAGE_ATTR_HARDSYN) && (cfg->msgattr != ARISC_MESSAGE_ATTR_SOFTSYN))) {
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ARISC_WRN("rsb read reg paras error\n");
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return -EINVAL;
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}
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/*
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* package address and data to message->paras,
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* message->paras data layout:
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* |para[0] |para[1]|para[2] |para[3]|para[4]|para[5]|para[6]|
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* |(len|datatype)|devaddr|regaddr0~3|data0 |data1 |data2 |data3 |
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*/
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paras[0] = 0;
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paras[1] = 0;
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paras[2] = 0;
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paras[3] = 0;
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paras[5] = 0;
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paras[6] = 0;
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paras[0] = ((cfg->len & 0xffff) | ((cfg->datatype << 16) & 0xffff0000));
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paras[1] = cfg->devaddr;
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for (i = 0; i < cfg->len; i++) {
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/* pack 8bit regaddr0~regaddr3 into 32bit paras[1] */
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paras[2] |= (cfg->regaddr[i] << (i * 8));
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}
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/* FIXME: if the runtime sever enable the mmu & dcache,
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* should not use flush cache here.
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*/
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/* send message use hwmsgbox */
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result = invoke_scp_fn_smc(ARM_SVC_ARISC_RSB_READ_BLOCK_DATA, virt_to_phys(paras), 0, 0);
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/* copy message readout data to user data buffer */
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for (i = 0; i < cfg->len; i++) {
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cfg->data[i] = paras[3 + i];
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}
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return result;
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}
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EXPORT_SYMBOL(arisc_rsb_read_block_data);
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/**
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* rsb write block data.
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* @cfg: point of arisc_rsb_block_cfg struct;
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*
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* return: result, 0 - write register successed,
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* !0 - write register failedor the len more then max len;
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*/
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int arisc_rsb_write_block_data(struct arisc_rsb_block_cfg *cfg)
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{
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int i;
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int result;
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u32 paras[22];
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if ((cfg == NULL) || (cfg->devaddr == 0) || (cfg->regaddr == NULL) || (cfg->data == NULL) || (cfg->len > RSB_TRANS_BYTE_MAX) ||
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((cfg->datatype != RSB_DATA_TYPE_BYTE) && (cfg->datatype != RSB_DATA_TYPE_HWORD) && (cfg->datatype != RSB_DATA_TYPE_WORD)) ||
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((cfg->msgattr != ARISC_MESSAGE_ATTR_HARDSYN) && (cfg->msgattr != ARISC_MESSAGE_ATTR_SOFTSYN))) {
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ARISC_WRN("rsb write reg paras error\n");
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return -EINVAL;
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}
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/*
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* package address and data to message->paras,
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* message->paras data layout:
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* |para[0] |para[1]|para[2] |para[3]|para[4]|para[5]|para[6]|
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* |(len|datatype)|devaddr|regaddr0~3|data0 |data1 |data2 |data3 |
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*/
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paras[0] = 0;
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paras[1] = 0;
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paras[2] = 0;
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paras[3] = 0;
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paras[5] = 0;
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paras[6] = 0;
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paras[0] = ((cfg->len & 0xffff) | ((cfg->datatype << 16) & 0xffff0000));
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paras[1] = cfg->devaddr;
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for (i = 0; i < cfg->len; i++) {
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/* pack 8bit regaddr0~regaddr3 into 32bit paras[1] */
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paras[2] |= (cfg->regaddr[i] << (i * 8));
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/* pack 32bit data0~data3 into 32bit paras[2]~paras[5] */
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paras[3 + i] = cfg->data[i];
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}
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/* FIXME: if the runtime sever enable the mmu & dcache,
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* should not use flush cache here.
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*/
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/* send message use hwmsgbox */
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result = invoke_scp_fn_smc(ARM_SVC_ARISC_RSB_WRITE_BLOCK_DATA, virt_to_phys(paras), 0, 0);
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return result;
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}
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EXPORT_SYMBOL(arisc_rsb_write_block_data);
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/**
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* rsb bits operation sync.
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* @cfg: point of arisc_rsb_bits_cfg struct;
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*
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* return: result, 0 - bits operation successed,
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* !0 - bits operation failed, or the len more then max len;
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*
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* rsb clear bits internal:
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* data = rsb_read(regaddr);
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* data = data & (~mask);
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* rsb_write(regaddr, data);
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*
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* rsb set bits internal:
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* data = rsb_read(addr);
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* data = data | mask;
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* rsb_write(addr, data);
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*
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*/
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int rsb_bits_ops_sync(struct arisc_rsb_bits_cfg *cfg)
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{
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int i;
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int result;
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u32 paras[22];
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if ((cfg == NULL) || (cfg->devaddr == 0) || (cfg->regaddr == NULL) || (cfg->mask == NULL) || (cfg->delay == NULL) || (cfg->len > RSB_TRANS_BYTE_MAX) ||
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((cfg->datatype != RSB_DATA_TYPE_BYTE) && (cfg->datatype != RSB_DATA_TYPE_HWORD) && (cfg->datatype != RSB_DATA_TYPE_WORD)) ||
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((cfg->msgattr != ARISC_MESSAGE_ATTR_HARDSYN) && (cfg->msgattr != ARISC_MESSAGE_ATTR_SOFTSYN))) {
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ARISC_WRN("rsb clear bits sync paras error\n");
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return -EINVAL;
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}
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/*
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* package address and data to message->paras,
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* message->paras data layout:
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* |para[0] |para[1]|para[2] |para[3]|para[4]|para[5]|para[6]|para[7] |para[8]|
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* |(len|datatype)|devaddr|regaddr0~3|mask0 |mask1 |mask2 |mask3 |delay0~3|ops |
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*/
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paras[0] = 0;
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paras[1] = 0;
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paras[2] = 0;
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paras[3] = 0;
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paras[4] = 0;
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paras[5] = 0;
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paras[6] = 0;
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paras[7] = 0;
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paras[8] = 0;
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paras[0] = ((cfg->len & 0xffff) | ((cfg->datatype << 16) & 0xffff0000));
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paras[1] = cfg->devaddr;
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paras[8] = cfg->ops;
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for (i = 0; i < cfg->len; i++) {
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/* pack 8bit regaddr0~regaddr3 into 32bit paras[1] */
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paras[2] |= (cfg->regaddr[i] << (i * 8));
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/* pack 32bit mask0~mask3 into 32bit paras[2] */
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paras[3 + i] = cfg->mask[i];
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/* pack 8bit delay0~delay3 into 32bit paras[6] */
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paras[7] |= (cfg->delay[i] << (i * 8));
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}
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/* FIXME: if the runtime sever enable the mmu & dcache,
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* should not use flush cache here.
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*/
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/* send message use hwmsgbox */
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result = invoke_scp_fn_smc(ARM_SVC_ARISC_RSB_BITS_OPS_SYNC, virt_to_phys(paras), 0, 0);
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return result;
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}
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EXPORT_SYMBOL(rsb_bits_ops_sync);
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/**
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* rsb set interface mode.
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* @devaddr: rsb slave device address;
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* @regaddr: register address of rsb slave device;
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* @data: data which to init rsb slave device interface mode;
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*
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* return: result, 0 - set interface mode successed,
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* !0 - set interface mode failed;
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*/
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int arisc_rsb_set_interface_mode(u32 devaddr, u32 regaddr, u32 data)
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{
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int result;
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/* send message use hwmsgbox */
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result = invoke_scp_fn_smc(ARM_SVC_ARISC_RSB_SET_INTERFACE_MODE, (u64)devaddr, (u64)regaddr, (u64)data);
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return result;
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}
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EXPORT_SYMBOL(arisc_rsb_set_interface_mode);
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/**
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* rsb set runtime slave address.
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* @devaddr: rsb slave device address;
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* @rtsaddr: rsb slave device's runtime slave address;
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*
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* return: result, 0 - set rsb runtime address successed,
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* !0 - set rsb runtime address failed;
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*/
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int arisc_rsb_set_rtsaddr(u32 devaddr, u32 rtsaddr)
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{
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int result;
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/* check audio codec has been initialized */
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if (devaddr == RSB_DEVICE_SADDR7) {
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if (audio_codec_init)
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return 0;
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else
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audio_codec_init = 1;
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}
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printk("%s-%u: devaddr:%x, rtsaddr:%x\n", __func__, __LINE__, devaddr, rtsaddr);
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/* send message use hwmsgbox */
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result = invoke_scp_fn_smc(ARM_SVC_ARISC_RSB_SET_RTSADDR, (u64)devaddr, (u64)rtsaddr, 0);
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return result;
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}
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EXPORT_SYMBOL(arisc_rsb_set_rtsaddr);
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#endif
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