From 31bf8f2268ec2258685e87fd832d1d890dc6298d Mon Sep 17 00:00:00 2001 From: Jacob Hrbek Date: Fri, 16 Sep 2022 05:04:15 +0200 Subject: [PATCH] PCB4_PWR_BTN_A: Update KiCAD and docs * Updated on KiCAD 6.0.3 * Added Stack-up table and graphics * Added General Notes to the gerber * Replaced BOM with generated one * Added README using export from gerber --- .../Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pcb | 1594 +++++++++++++---- .../Rev.A/PCB4-PWR-BTN_Rev.A.kicad_prl | 75 + .../Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pro | 432 +++++ .../Rev.A/PCB4-PWR-BTN_Rev.A.kicad_sch | 446 +++++ .../Rev.A/PCB4-PWR-BTN_Rev.A_BOM.csv | 3 + .../TERES-PCB4-PWR-BTN/Rev.A/README.pdf | Bin 0 -> 86371 bytes .../Rev.A/TERES-PCB4-PWR-BTN_Rev.A.pdf | Bin 10032 -> 0 bytes .../Rev.A/TERES-PCB4-PWR-BTN_Rev.A_BOM.pdf | Bin 21796 -> 0 bytes .../TERES-PCB4-PWR-BTN/Rev.A/fp-info-cache | 1 + 9 files changed, 2170 insertions(+), 381 deletions(-) create mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_prl create mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pro create mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_sch create mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A_BOM.csv create mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/README.pdf delete mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/TERES-PCB4-PWR-BTN_Rev.A.pdf delete mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/TERES-PCB4-PWR-BTN_Rev.A_BOM.pdf create mode 100644 HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/fp-info-cache diff --git a/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pcb b/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pcb index 2e47b467..6d58e63d 100644 --- a/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pcb +++ b/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A.kicad_pcb @@ -1,456 +1,1288 @@ -(kicad_pcb (version 20160815) (host pcbnew 4.1.0-alpha+201608171232+7063~46~ubuntu14.04.1-product) +(kicad_pcb (version 20211014) (generator pcbnew) (general - (links 13) - (no_connects 0) - (area 89.924999 69.924999 126.075001 80.075001) (thickness 1.6) - (drawings 9) - (tracks 57) - (zones 0) - (modules 8) - (nets 3) ) - (page A4) + (paper "A4") + (title_block + (title "Power Button for TERES-1") + (date "31-03-2018") + (rev "A") + (company "OLIMEX, Ltd.") + ) + (layers - (0 F.Cu signal) - (31 B.Cu signal) - (32 B.Adhes user) - (33 F.Adhes user hide) - (34 B.Paste user hide) - (35 F.Paste user) - (36 B.SilkS user hide) - (37 F.SilkS user) - (38 B.Mask user) - (39 F.Mask user) - (40 Dwgs.User user) - (41 Cmts.User user) - (42 Eco1.User user) - (43 Eco2.User user) - (44 Edge.Cuts user) - (45 Margin user) - (46 B.CrtYd user) - (47 F.CrtYd user) - (48 B.Fab user hide) - (49 F.Fab user hide) + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (58 "User.9" user "User.Measurements") ) (setup - (last_trace_width 0.508) - (trace_clearance 0.2) - (zone_clearance 0.508) - (zone_45_only no) - (trace_min 0.2) - (segment_width 0.2) - (edge_width 0.15) - (via_size 0.8) - (via_drill 0.4) - (via_min_size 0.4) - (via_min_drill 0.3) - (uvia_size 0.3) - (uvia_drill 0.1) - (uvias_allowed no) - (uvia_min_size 0) - (uvia_min_drill 0) - (pcb_text_width 0.3) - (pcb_text_size 1.5 1.5) - (mod_edge_width 0.15) - (mod_text_size 1 1) - (mod_text_width 0.15) - (pad_size 6 6) - (pad_drill 2.2) + (stackup + (layer "F.SilkS" (type "Top Silk Screen")) + (layer "F.Paste" (type "Top Solder Paste")) + (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) + (layer "F.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "B.Cu" (type "copper") (thickness 0.035)) + (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) + (layer "B.Paste" (type "Bottom Solder Paste")) + (layer "B.SilkS" (type "Bottom Silk Screen")) + (copper_finish "None") + (dielectric_constraints no) + ) (pad_to_mask_clearance 0.2) (pad_to_paste_clearance -0.01) (aux_axis_origin 90 80) - (visible_elements FFFFFF7F) (pcbplotparams - (layerselection 0x0000c_7ffffffe) + (layerselection 0x000000c_7ffffffe) + (disableapertmacros false) (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (svguseinch false) + (svgprecision 6) (excludeedgelayer false) - (linewidth 0.600000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) - (hpglpendiameter 15) + (hpglpendiameter 15.000000) + (dxfpolygonmode true) + (dxfimperialunits true) + (dxfusepcbnewfont true) (psnegative false) (psa4output false) (plotreference true) (plotvalue false) (plotinvisibletext false) - (padsonsilk false) + (sketchpadsonfab false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 0) (scaleselection 1) - (outputdirectory "")) + (outputdirectory "") + ) ) (net 0 "") - (net 1 GND) + (net 1 "GND") (net 2 "Net-(P1-Pad3)") + (net 3 "unconnected-(P1-Pad5)") - (net_class Default "This is the default net class." - (clearance 0.2) - (trace_width 0.508) - (via_dia 0.8) - (via_drill 0.4) - (uvia_dia 0.3) - (uvia_drill 0.1) - (diff_pair_gap 0.25) - (diff_pair_width 0.2) - (add_net GND) - (add_net "Net-(P1-Pad3)") - ) - - (module OLIMEX_Buttons-FP:tacktil_5x5_teres (layer B.Cu) (tedit 57C541F5) (tstamp 576144DD) - (at 108 75) - (path /5761D58F) - (fp_text reference SW1 (at -0.1135 3.8035) (layer B.SilkS) - (effects (font (size 1.778 1.778) (thickness 0.381)) (justify mirror)) - ) - (fp_text value SW_PUSH (at 0 -3.5) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_line (start 1.25 2.5) (end 2 1.75) (layer B.SilkS) (width 0.1)) - (fp_line (start 2.5 0) (end 2.5 -1) (layer B.SilkS) (width 0.1)) - (fp_line (start 1.25 -2.5) (end 2 -1.75) (layer B.SilkS) (width 0.1)) - (fp_line (start -1.25 -2.5) (end 1.25 -2.5) (layer B.SilkS) (width 0.1)) - (fp_line (start -1.25 -2.5) (end -2 -1.75) (layer B.SilkS) (width 0.1)) - (fp_line (start -2.5 1) (end -2.5 -1) (layer B.SilkS) (width 0.1)) - (fp_line (start -1.25 2.5) (end -2 1.75) (layer B.SilkS) (width 0.1)) - (fp_line (start 1.25 2.5) (end -1.25 2.5) (layer B.SilkS) (width 0.1)) - (fp_line (start 2.5 0) (end 2.5 1) (layer B.SilkS) (width 0.1)) - (pad 1 smd rect (at -3 1.75) (size 1.524 1) (layers B.Cu B.Paste B.Mask) - (net 1 GND)) - (pad 2 smd rect (at -3 -1.75) (size 1.524 1) (layers B.Cu B.Paste B.Mask) - (net 2 "Net-(P1-Pad3)")) - (pad 2 smd rect (at 3 -1.75) (size 1.524 1) (layers B.Cu B.Paste B.Mask) - (net 2 "Net-(P1-Pad3)")) - (pad 1 smd rect (at 3 1.75) (size 1.524 1) (layers B.Cu B.Paste B.Mask) - (net 1 GND)) - ) - - (module OLIMEX_Other-FP:Fiducial1x3_transp (layer B.Cu) (tedit 5540CDCA) (tstamp 57B70144) - (at 98 72.2) - (attr virtual) - (fp_text reference "" (at 0 -3) (layer B.SilkS) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_text value "" (at 0 3) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_circle (center 0 0) (end 1.5 0) (layer Dwgs.User) (width 0.254)) - (pad Fid1 connect circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) - (solder_mask_margin 0.127) (clearance 1.016) (zone_connect 0)) - ) - - (module OLIMEX_Other-FP:Fiducial1x3_transp (layer B.Cu) (tedit 5540CDCA) (tstamp 57B7014A) - (at 118.6 77.7) - (attr virtual) - (fp_text reference "" (at 0 -3) (layer B.SilkS) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_text value "" (at 0 3) (layer B.Fab) - (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) - ) - (fp_circle (center 0 0) (end 1.5 0) (layer Dwgs.User) (width 0.254)) - (pad Fid1 connect circle (at 0 0) (size 1 1) (layers B.Cu B.Mask) - (solder_mask_margin 0.127) (clearance 1.016) (zone_connect 0)) - ) - - (module OLIMEX_Other-FP:Fiducial1x3_transp (layer F.Cu) (tedit 5540CDCA) (tstamp 57B70154) - (at 118.6 77.7) - (attr virtual) - (fp_text reference "" (at 0 3) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value "" (at 0 -3) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_circle (center 0 0) (end 1.5 0) (layer Dwgs.User) (width 0.254)) - (pad Fid1 connect circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) - (solder_mask_margin 0.127) (clearance 1.016) (zone_connect 0)) - ) - - (module OLIMEX_Other-FP:Fiducial1x3_transp (layer F.Cu) (tedit 5540CDCA) (tstamp 57B7015A) - (at 98 72.2) - (attr virtual) - (fp_text reference "" (at 0 3) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value "" (at 0 -3) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_circle (center 0 0) (end 1.5 0) (layer Dwgs.User) (width 0.254)) - (pad Fid1 connect circle (at 0 0) (size 1 1) (layers F.Cu F.Mask) - (solder_mask_margin 0.127) (clearance 1.016) (zone_connect 0)) - ) - - (module OLIMEX_Other-FP:Mounting_hole_2.5mm (layer F.Cu) (tedit 57BADC9C) (tstamp 576145D2) - (at 123 75) - (attr virtual) - (fp_text reference MountingHole (at 0.05 -3.7) (layer F.Fab) hide - (effects (font (size 0.8 0.8) (thickness 0.2))) - ) - (fp_text value Mounting_hole_2.5mm (at 0.45 3.45) (layer F.Fab) hide - (effects (font (size 0.5 0.5) (thickness 0.125))) - ) - (pad "" thru_hole circle (at 0 0) (size 6 6) (drill 2.2) (layers *.Cu *.Mask) - (net 1 GND) (clearance 1.55)) - ) - - (module OLIMEX_Other-FP:Mounting_hole_2.5mm (layer F.Cu) (tedit 57BADC91) (tstamp 57614581) - (at 93 75) - (attr virtual) - (fp_text reference MountingHole (at 0.05 -3.7) (layer F.Fab) hide - (effects (font (size 0.8 0.8) (thickness 0.2))) - ) - (fp_text value Mounting_hole_2.5mm (at 0.45 3.45) (layer F.Fab) hide - (effects (font (size 0.5 0.5) (thickness 0.125))) - ) - (pad "" thru_hole circle (at 0 0) (size 6 6) (drill 2.2) (layers *.Cu *.Mask) - (net 1 GND) (clearance 1.55)) - ) - - (module OLIMEX_Connectors-FP:FLEXCON-0.5-6 (layer F.Cu) (tedit 57C53E0D) (tstamp 576144D5) - (at 114.5 75 90) - (path /57C54AB3) - (fp_text reference P1 (at 0 3.175 270) (layer F.SilkS) + (footprint "OLIMEX_Connectors-FP:FLEXCON-0.5-6" (layer "F.Cu") + (tedit 57C53E0D) (tstamp 00000000-0000-0000-0000-0000576144d5) + (at 93.68 53.96 90) + (property "Sheetfile" "PCB4-PWR-BTN_Rev.A.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000057c54ab3") + (attr through_hole) + (fp_text reference "P1" (at 0 3.175 270) (layer "F.SilkS") (effects (font (size 1.27 1.27) (thickness 0.254))) + (tstamp df565bd7-78de-415c-ad64-e1f2c17076a3) ) - (fp_text value CONN_01X06 (at 0 -3.81 90) (layer F.Fab) + (fp_text value "WZA21-06" (at 0 -3.81 90) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp b05805ec-9340-4eb8-ba48-9d152631e48f) ) - (fp_line (start -4.0005 2.0955) (end -4.0005 1.8415) (layer F.SilkS) (width 0.254)) - (fp_line (start 4.0005 2.0955) (end 4.0005 1.8415) (layer F.SilkS) (width 0.254)) - (fp_line (start -4.0005 2.0955) (end 4.0005 2.0955) (layer F.SilkS) (width 0.254)) - (fp_line (start -4 -2.3) (end -4 2.1) (layer F.Fab) (width 0.254)) - (fp_line (start 4 -2.3) (end -4 -2.3) (layer F.Fab) (width 0.254)) - (fp_line (start 4 2.1) (end 4 -2.3) (layer F.Fab) (width 0.254)) - (fp_line (start -4 2.1) (end 4 2.1) (layer F.Fab) (width 0.254)) - (pad 0 smd rect (at 3.4 0.1 90) (size 2.4 3) (layers F.Cu F.Paste F.Mask) - (net 1 GND) (solder_mask_margin -0.01) (solder_paste_margin -0.01)) - (pad 1 smd rect (at -1.25 -2.15 90) (size 0.25 1.3) (layers F.Cu F.Paste F.Mask) - (net 1 GND) (solder_mask_margin 0.0508) (solder_paste_margin -0.01)) - (pad 2 smd rect (at -0.75 -2.15 90) (size 0.25 1.3) (layers F.Cu F.Paste F.Mask) - (net 1 GND) (solder_mask_margin 0.0508) (solder_paste_margin -0.01)) - (pad 3 smd rect (at -0.25 -2.15 90) (size 0.25 1.3) (layers F.Cu F.Paste F.Mask) - (net 2 "Net-(P1-Pad3)") (solder_mask_margin 0.0508) (solder_paste_margin -0.01)) - (pad 4 smd rect (at 0.25 -2.15 90) (size 0.25 1.3) (layers F.Cu F.Paste F.Mask) - (net 2 "Net-(P1-Pad3)") (solder_mask_margin 0.0508) (solder_paste_margin -0.01)) - (pad 5 smd rect (at 0.75 -2.15 90) (size 0.25 1.3) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.0508) (solder_paste_margin -0.01)) - (pad 6 smd rect (at 1.25 -2.15 90) (size 0.25 1.3) (layers F.Cu F.Paste F.Mask) - (net 1 GND) (solder_mask_margin 0.0508) (solder_paste_margin -0.01)) - (pad 0 smd rect (at -3.2 -0.3 90) (size 2.8 3.8) (layers F.Cu) - (net 1 GND) (solder_mask_margin -0.1) (solder_paste_margin -0.1)) - (pad 0 smd rect (at 3.2 -0.3 90) (size 2.8 3.8) (layers F.Cu) - (net 1 GND) (solder_mask_margin -0.1) (solder_paste_margin -0.1)) - (pad 0 smd rect (at -3.4 0.1 90) (size 2.4 3) (layers F.Cu F.Paste F.Mask) - (net 1 GND) (solder_mask_margin -0.01) (solder_paste_margin -0.01)) + (fp_line (start -4.0005 2.0955) (end 4.0005 2.0955) (layer "F.SilkS") (width 0.254) (tstamp 6564d19b-7446-4c87-acc4-5710a33b0d69)) + (fp_line (start 4.0005 2.0955) (end 4.0005 1.8415) (layer "F.SilkS") (width 0.254) (tstamp ad12c615-adb5-4e91-8c89-1172f6499b44)) + (fp_line (start -4.0005 2.0955) (end -4.0005 1.8415) (layer "F.SilkS") (width 0.254) (tstamp e79aa0ef-ff66-4bd2-a2e9-8cf4577ec3c6)) + (fp_line (start -4 -2.3) (end -4 2.1) (layer "F.Fab") (width 0.254) (tstamp 94f5396d-70b7-4b46-a1aa-0eb6b253fb51)) + (fp_line (start 4 2.1) (end 4 -2.3) (layer "F.Fab") (width 0.254) (tstamp a64180f9-8365-4497-b14f-db4d21e4ad46)) + (fp_line (start 4 -2.3) (end -4 -2.3) (layer "F.Fab") (width 0.254) (tstamp cb84d4b3-c133-467a-a9b7-1791b58f0765)) + (fp_line (start -4 2.1) (end 4 2.1) (layer "F.Fab") (width 0.254) (tstamp e5528fff-3a6a-4f7b-8e80-c2fe0a5386f8)) + (pad "0" smd rect locked (at 3.4 0.1 90) (size 2.4 3) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin -0.01) (solder_paste_margin -0.01) (tstamp 912a777b-c8ab-4797-ab74-be27d5e9ebd1)) + (pad "0" smd rect locked (at -3.2 -0.3 90) (size 2.8 3.8) (layers "F.Cu") + (solder_mask_margin -0.1) (solder_paste_margin -0.1) (tstamp ab698c7d-b4ef-4bbd-b92c-435e841050eb)) + (pad "0" smd rect locked (at -3.4 0.1 90) (size 2.4 3) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin -0.01) (solder_paste_margin -0.01) (tstamp c5e91ec0-6377-45cc-8dec-ee09a43c267a)) + (pad "0" smd rect locked (at 3.2 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FABRICATE PER ANSI/IPC-A-600.IPC-QE-605.IPC-4552\n AND IPC-SM-840 SPECIFICATIONS.\n2. USE ROHS-COMPLIANT MATERIALS.\n3. SOLDERMASK BOTH SIDES OF THE BOARD OVER BARE\n COPPER WITH MATERIALS PER ANSI/IPC-SM-840.\n4. SEE FABRICATION FILES WITH SAME TITLE OR DRAWING,\n AND REVISION, AS THIS DRAWING\n5. APPLY SILKSCREEN TO BOTH SIDES OF THE BOARD\n USING NON-CONDUCTIVE EPOXY INK\n6. SEE SEPARATE DRILL FILE FOR HOLE LOCATIONS\n\nRecommended colors:\n - Solder Mask: Red\n - Silkscreen: White (expected to be clearly \n readable on solder mask)\n - Base Material: Neutral\n\nMaterials:\na. Base material Laminated Epoxy Glass FR-4 \n with copper traces\n - TG 150-160 to TG 170-180 recommended\n - Recommended copper thickness 0.6 to 1.6mm\n - Min track spacing 3/3mil\n - Hole size: 2.2mm +/- 0.25mm\n - Thickness per stack-up table\n - No edge connector\n - Surface finish: HASL lead free\nb. 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(property "Reference" "P1" (id 0) (at 198.12 90.17 0)) + (property "Value" "" (id 1) (at 198.12 92.71 0)) + (property "Footprint" "" (id 2) (at 198.12 81.28 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Datasheet" "" (id 3) (at 198.12 81.28 0)) + (pin "1" (uuid 5b6c2146-b228-4adf-b846-415f38c6f05f)) + (pin "2" (uuid 472839d3-997d-4519-9af0-e90551e65597)) + (pin "3" (uuid 6f100dd2-7c4d-4da0-9aff-396cc706fd9f)) + (pin "4" (uuid 69e3db20-76f0-4a12-aa08-c837ec57320a)) + (pin "5" (uuid 78381816-76e5-4f7d-8c23-2752d8b92f73)) + (pin "6" (uuid 95a1d08d-04fe-41c3-93dd-80733a328b84)) + ) + + (sheet_instances + (path "/" (page "1")) + ) + + (symbol_instances + (path "/00000000-0000-0000-0000-000057c544d1" + (reference "#FLG03") (unit 1) (value "PWR_FLAG") (footprint "") + ) + (path "/00000000-0000-0000-0000-00005761d5f1" + (reference "#PWR01") (unit 1) (value "GND") (footprint "") + ) + (path "/00000000-0000-0000-0000-00005761d614" + (reference "#PWR02") (unit 1) (value "GND") (footprint "") + ) + (path "/00000000-0000-0000-0000-000057c54ab3" + (reference "P1") (unit 1) (value "WZA21-06") (footprint "OLIMEX_Connectors-FP:FLEXCON-0.5-6") + ) + (path "/00000000-0000-0000-0000-00005761d58f" + (reference "SW1") (unit 1) (value "SW_PUSH") (footprint "OLIMEX_Buttons-FP:tacktil_5x5_teres") + ) + ) +) diff --git a/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A_BOM.csv b/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A_BOM.csv new file mode 100644 index 00000000..f710001a --- /dev/null +++ b/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/PCB4-PWR-BTN_Rev.A_BOM.csv @@ -0,0 +1,3 @@ +"Id";"Designator";"Package";"Quantity";"Designation";"Supplier and ref"; +1;"P1";"FLEXCON-0.5-6";1;"WZA21-06";;; +2;"SW1";"tacktil_5x5_teres";1;"SW_PUSH";;; diff --git a/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/README.pdf b/HARDWARE/A64-TERES/TERES-PCB4-PWR-BTN/Rev.A/README.pdf new file mode 100644 index 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