264 lines
6.4 KiB
C
Executable File
264 lines
6.4 KiB
C
Executable File
//*****************************************************************************
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// All Winner Tech, All Right Reserved. 2006-2014 Copyright (c)
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//
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// File name : di.c
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//
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// Description :
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//
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// History :
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//
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//
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//******************************************************************************
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#include "di.h"
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#include "di_ebios.h"
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#include <linux/slab.h>
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volatile __di_dev_t *di_dev;
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//
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//function: di_set_reg_base(u32 base)
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//description: set di module register base
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//parameters: base <di module AHB memory mapping >
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//return :
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s32 di_set_reg_base(void* base)
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{
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di_dev = (__di_dev_t *)base;
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return 0;
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}
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//
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//function: di_get_reg_base(void)
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//description: get di module register base
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//parameters:
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//return : di module AHB memory mapping
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void* di_get_reg_base(void)
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{
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void* ret = NULL;
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ret = (void*)(di_dev);
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return ret;
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}
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//
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//function: di_set_init(void)
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//description: set di module default register to ready de-interlace
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//parameters:
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//return :
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s32 di_set_init(void)
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{
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DI_Init();
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return 0;
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}
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//
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//function: di_reset(void)
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//description: stop di module
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//parameters:
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//return :
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s32 di_reset(void)
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{
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DI_Set_Reset();
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return 0;
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}
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//
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//function: di_start(void)
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//description: start a de-interlace function
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//parameters:
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//return :
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s32 di_start(void)
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{
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DI_Set_Writeback_Start();
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return 0;
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}
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//
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//function: di_irq_enable(u32 enable)
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//description: enable/disable di irq
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//parameters: enable <0-disable; 1-enable>
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//return :
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s32 di_irq_enable(u32 enable)
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{
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DI_Set_Irq_Enable(enable);
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return 0;
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}
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//
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//function: di_get_status(void)
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//description: get status of di module
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//parameters:
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//return : <0-Writeback finish; 1-Writeback no start; 2-Writeback-ing; (-1)-Undefined
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s32 di_get_status(void)
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{
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s32 ret;
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ret = DI_Get_Irq_Status();
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return ret;
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}
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//
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//function: di_irq_clear()
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//description: clear irq status
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//parameters:
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//return :
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s32 di_irq_clear(void)
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{
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DI_Clear_irq();
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return 0;
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}
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//
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//function: di_set_para(__disp_scaler_para_t *para)
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//description: set parameters to ready a de-interlace function
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//parameters: para <parameters which set from ioctrl>
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// in_flag_add/out_flag_add <flag address malloc in driver>
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// field <0 - select even line for source line; 1 - select odd line for source line>
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//return : <0 - set OK; 1 - para NULL>
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s32 di_set_para(__di_para_t *para, void* in_flag_add, void* out_flag_add, u32 field)
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{
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__di_buf_addr_t in_addr;
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__di_buf_addr_t out_addr;
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__di_src_size_t in_size;
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__di_out_size_t out_size;
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__di_src_type_t in_type;
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__di_out_type_t out_type;
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__di_buf_addr_t pre_addr;
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unsigned long in_address = 0;
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unsigned long out_address = 0;
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unsigned long ch0_addr = 0;
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unsigned long ch1_addr = 0;
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if(para==NULL) {
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//DE_WRN("input parameter can't be null!\n");
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return -1;
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}
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in_type.fmt= di_sw_para_to_reg(0,para->input_fb.format);
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in_type.mod= di_sw_para_to_reg(1,para->input_fb.format);
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in_type.ps= di_sw_para_to_reg(2,para->input_fb.format);
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out_type.fmt = di_sw_para_to_reg(3,para->output_fb.format);
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out_type.ps = di_sw_para_to_reg(4,para->output_fb.format);
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out_type.alpha_en = 0;
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out_size.width = para->out_regn.width;
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out_size.height = para->out_regn.height;
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out_size.fb_width = para->output_fb.size.width;
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out_size.fb_height = para->output_fb.size.height;
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ch0_addr = (unsigned long)(para->input_fb.addr[0]);
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ch1_addr = (unsigned long)(para->input_fb.addr[1]);
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in_addr.ch0_addr = (u32)(ch0_addr);
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in_addr.ch1_addr = (u32)(ch1_addr);
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in_size.src_width = para->input_fb.size.width;
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in_size.src_height = para->input_fb.size.height;
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in_size.scal_width= para->source_regn.width;
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in_size.scal_height= para->source_regn.height;
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ch0_addr = (unsigned long)(para->output_fb.addr[0]);
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ch1_addr = (unsigned long)(para->output_fb.addr[1]);
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out_addr.ch0_addr = (u32)(ch0_addr);
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out_addr.ch1_addr = (u32)(ch1_addr);
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ch0_addr = (unsigned long)(para->pre_fb.addr[0]);
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ch1_addr = (unsigned long)(para->pre_fb.addr[1]);
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pre_addr.ch0_addr = (u32)(ch0_addr);
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pre_addr.ch1_addr = (u32)(ch1_addr);
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DI_Module_Enable();
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DI_Config_Src(&in_addr,&in_size,&in_type);
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DI_Set_Scaling_Factor(&in_size, &out_size);
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DI_Set_Scaling_Coef(&in_size, &out_size, &in_type, &out_type);
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DI_Set_Out_Format(&out_type);
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DI_Set_Out_Size(&out_size);
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DI_Set_Writeback_Addr_ex(&out_addr,&out_size,&out_type);
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DI_Set_Di_PreFrame_Addr(pre_addr.ch0_addr, pre_addr.ch1_addr);
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in_address = (unsigned long)(in_flag_add);
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out_address = (unsigned long)(out_flag_add);
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DI_Set_Di_MafFlag_Src((u32 )(in_address), (u32 )(out_address), 0x200);
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DI_Set_Di_Field(field);
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DI_Enable();
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DI_Set_Reg_Rdy();
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return 0;
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}
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// 0:deinterlace input pixel format
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// 1:deinterlace input yuv mode
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// 2:deinterlace input pixel sequence
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// 3:deinterlace output format
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// 4:deinterlace output pixel sequence
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s32 di_sw_para_to_reg(u8 type, u8 format)
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{
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/* deinterlace input pixel format */
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if(type == 0) {
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if(format <= DI_FORMAT_MB32_21) {
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return DI_INYUV420;
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} else {
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//DE_INF("not supported de-interlace input pixel format:%d in di_sw_para_to_reg\n",format);
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}
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}
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/* deinterlace input mode */
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else if(type == 1) {
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if((format == DI_FORMAT_MB32_21) || (format == DI_FORMAT_MB32_12)){
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return DI_UVCOMBINEDMB;
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} else if((format == DI_FORMAT_NV21) || (format == DI_FORMAT_NV12)){
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return DI_UVCOMBINED;
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} else {
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//DE_INF("not supported de-interlace input mode:%d in di_sw_para_to_reg\n", format);
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}
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}
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/* deinterlace input pixel sequence */
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else if(type == 2) {
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if((format == DI_FORMAT_MB32_12) || (format == DI_FORMAT_NV12)) {
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return DI_UVUV;
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} else if((format == DI_FORMAT_MB32_21) || (format == DI_FORMAT_NV21)) {
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return DI_VUVU;
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} else {
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//DE_INF("not supported de-interlace input pixel sequence:%d in di_sw_para_to_reg\n",format);
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}
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}
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/* deinterlace output format */
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else if(type == 3) {
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if((format == DI_FORMAT_NV12) || (format == DI_FORMAT_NV21)) {
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return DI_OUTUVCYUV420;
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} else {
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//DE_INF("not supported de-interlace output format :%d in di_sw_para_to_reg\n", format);
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}
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}
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/*deinterlace output pixel sequence*/
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else if(type == 4) {
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if(format == DI_FORMAT_NV12) {
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return DI_UVUV;
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} else if(format == DI_FORMAT_NV21) {
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return DI_VUVU;
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} else{
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//DE_INF("not supported de-interlace output pixel sequence:%d in di_sw_para_to_reg\n", format);
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}
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}
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//DE_INF("not supported type:%d in di_sw_para_to_reg\n", type);
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return -1;
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}
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s32 di_internal_clk_enable(void)
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{
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return DI_Internal_Set_Clk(1);
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}
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s32 di_internal_clk_disable(void)
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{
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return DI_Internal_Set_Clk(0);
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}
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