254 lines
6.1 KiB
C
254 lines
6.1 KiB
C
/*
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* (C) Copyright 2007-2015
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Jerry Wang <wangflord@allwinnertech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <sunxi_mbr.h>
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#include <boot_type.h>
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#include <sys_partition.h>
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#include <sys_config.h>
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#include <mmc.h>
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#include <power/sunxi/axp.h>
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#include <asm/io.h>
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#include <power/sunxi/pmu.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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/* add board specific code here */
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int board_init(void)
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{
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// gd->bd->bi_arch_number = LINUX_MACHINE_ID;
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// gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100);
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// debug("board_init storage_type = %d\n",uboot_spare_head.boot_data.storage_type);
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u32 reg_val;
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//set sram for vedio use, default is boot use
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reg_val = readl(0x01c00004);
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reg_val &= ~(0x1<<24);
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writel(reg_val, 0x01c00004);
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//VE gating :brom set this bit, but not require now
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reg_val = readl(0x01c20064);
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reg_val &= ~(0x1<<0);
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writel(reg_val, 0x01c20064);
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//VE Bus Reset: brom set this bit, but not require now
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reg_val = readl(0x1c202c4);
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reg_val &= ~(0x1<<0);
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writel(reg_val, 0x1c202c4);
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return 0;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = gd->ram_size;
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}
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/*
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************************************************************************************************************
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*
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* function
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*
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* name :
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*
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* parmeters :
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*
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* return :
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*
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* note :
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*
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*
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************************************************************************************************************
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*/
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int dram_init(void)
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{
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uint *addr = NULL;
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addr = (uint *)uboot_spare_head.boot_data.dram_para;
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if(addr[4])
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{
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gd->ram_size = (addr[4] & 0xffff) * 1024 * 1024;
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}
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else
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{
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gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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}
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//reserve trusted dram
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gd->ram_size -= PLAT_TRUSTED_DRAM_SIZE;
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print_size(gd->ram_size, "");
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putc('\n');
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#if 0
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puts("dram_para_set start\n");
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script_parser_patch("dram_para", "dram_clk", &addr[0], 1);
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script_parser_patch("dram_para", "dram_type", &addr[1], 1);
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script_parser_patch("dram_para", "dram_zq", &addr[2], 1);
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script_parser_patch("dram_para", "dram_odt_en", &addr[3], 1);
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script_parser_patch("dram_para", "dram_para1", &addr[4], 1);
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script_parser_patch("dram_para", "dram_para2", &addr[5], 1);
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script_parser_patch("dram_para", "dram_mr0", &addr[6], 1);
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script_parser_patch("dram_para", "dram_mr1", &addr[7], 1);
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script_parser_patch("dram_para", "dram_mr2", &addr[8], 1);
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script_parser_patch("dram_para", "dram_mr3", &addr[9], 1);
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script_parser_patch("dram_para", "dram_tpr0", &addr[10], 1);
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script_parser_patch("dram_para", "dram_tpr1", &addr[11], 1);
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script_parser_patch("dram_para", "dram_tpr2", &addr[12], 1);
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script_parser_patch("dram_para", "dram_tpr3", &addr[13], 1);
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script_parser_patch("dram_para", "dram_tpr4", &addr[14], 1);
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script_parser_patch("dram_para", "dram_tpr5", &addr[15], 1);
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script_parser_patch("dram_para", "dram_tpr6", &addr[16], 1);
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script_parser_patch("dram_para", "dram_tpr7", &addr[17], 1);
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script_parser_patch("dram_para", "dram_tpr8", &addr[18], 1);
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script_parser_patch("dram_para", "dram_tpr9", &addr[19], 1);
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script_parser_patch("dram_para", "dram_tpr10", &addr[20], 1);
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script_parser_patch("dram_para", "dram_tpr11", &addr[21], 1);
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script_parser_patch("dram_para", "dram_tpr12", &addr[22], 1);
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script_parser_patch("dram_para", "dram_tpr13", &addr[23], 1);
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puts("dram_para_set end\n");
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#endif
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return 0;
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}
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#ifdef CONFIG_GENERIC_MMC
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extern int sunxi_mmc_init(int sdc_no);
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int board_mmc_init(bd_t *bis)
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{
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sunxi_mmc_init(bis->bi_card_num);
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return 0;
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}
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void board_mmc_pre_init(int card_num)
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{
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bd_t *bd;
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bd = gd->bd;
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gd->bd->bi_card_num = card_num;
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mmc_initialize(bd);
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}
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int board_mmc_get_num(void)
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{
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return gd->boot_card_num;
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}
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void board_mmc_set_num(int num)
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{
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gd->boot_card_num = num;
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}
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#endif
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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printf("Board: SUN6I\n");
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return 0;
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}
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#endif
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int cpu0_set_detected_paras(void)
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{
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return 0;
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}
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ulong get_spare_head_size(void)
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{
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return (ulong)sizeof(struct spare_boot_head_t);
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}
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extern int axp81_probe(void);
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/**
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* platform_axp_probe -detect the pmu on board
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* @sunxi_axp_dev_pt: pointer to the axp array
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* @max_dev: offset of the property to retrieve
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* returns:
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* the num of pmu
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*/
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int platform_axp_probe(sunxi_axp_dev_t *sunxi_axp_dev_pt[], int max_dev)
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{
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if(axp81_probe())
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{
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printf("probe axp81X failed\n");
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sunxi_axp_dev_pt[0] = &sunxi_axp_null;
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return 0;
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}
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/* pmu type AXP81X */
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tick_printf("PMU: AXP81X found\n");
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sunxi_axp_dev_pt[0] = &sunxi_axp_81;
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sunxi_axp_dev_pt[PMU_TYPE_81X] = &sunxi_axp_81;
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//find one axp
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return 1;
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}
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char* board_hardware_info(void)
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{
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static char * hardware_info = "sun50iw1p1";
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return hardware_info;
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}
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