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TERES/SOFTWARE/A64-TERES/u-boot_new/arch/arm/cpu/armv8/fsl-lsch3
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Dimitar Gamishev 093685c7d8 u-boot
2017-10-13 14:02:55 +03:00
..
cpu.c u-boot 2017-10-13 14:02:55 +03:00
cpu.h u-boot 2017-10-13 14:02:55 +03:00
lowlevel.S u-boot 2017-10-13 14:02:55 +03:00
Makefile u-boot 2017-10-13 14:02:55 +03:00
README u-boot 2017-10-13 14:02:55 +03:00
speed.c u-boot 2017-10-13 14:02:55 +03:00
speed.h u-boot 2017-10-13 14:02:55 +03:00

README 

#
# Copyright 2014 Freescale Semiconductor
#
# SPDX-License-Identifier:      GPL-2.0+
#

Freescale LayerScape with Chassis Generation 3

This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
for example LS2085A.